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edd54f82b6
Add condition for MachineLICM to safely hoist instructions that utilize non constant registers that are reserved. On PPC, global variable access is done through the table of contents (TOC) which is always in register X2. The ABI reserves this register in any functions that have calls or access global variables. A call through a function pointer involves saving, changing and restoring this register around the call and thus MachineLICM does not consider it to be invariant. We can however guarantee the register is preserved across the call and thus is invariant. Differential Revision: https://reviews.llvm.org/D33562 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305490 91177308-0d34-0410-b5e6-96231b3b80d8
111 lines
4.2 KiB
LLVM
111 lines
4.2 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
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; The instructions ADDIStocHA/LDtocL are used to calculate the address of
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; globals. The ones that are in bb.3.if.end could not be hoisted by Machine
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; LICM due to BCTRL_LDinto_toc in bb2.if.then. This call causes the compiler
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; to insert a save TOC to stack before the call and load into X2 to restore TOC
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; after. By communicating to Machine LICM that X2 is guaranteed to have the
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; same value before and after BCTRL_LDinto_toc, these instructions can be
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; hoisted out of bb.3.if.end to outside of the loop.
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; Pre Machine LICM MIR
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;
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;body:
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; bb.0.entry:
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; successors: %bb.2.if.then(0x40000000), %bb.3.if.end(0x40000000)
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; liveins: %x3
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;
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; %4 = COPY %x3
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; %5 = ADDIStocHA %x2, @ga
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; %6 = LDtocL @ga, killed %5 :: (load 8 from got)
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; %7 = LWZ 0, %6 :: (volatile dereferenceable load 4 from @ga)
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; %8 = ADDIStocHA %x2, @gb
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; %9 = LDtocL @gb, killed %8 :: (load 8 from got)
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; %10 = LWZ 0, killed %9 :: (volatile dereferenceable load 4 from @gb)
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; %0 = LWZ 0, %6 :: (volatile dereferenceable load 4 from @ga)
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; %11 = CMPW killed %7, killed %10
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; BCC 44, killed %11, %bb.2.if.then
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; B %bb.3.if.end
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;
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; bb.2.if.then:
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; %1 = PHI %0, %bb.0.entry, %3, %bb.3.if.end
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; ADJCALLSTACKDOWN 32, 0, implicit-def dead %r1, implicit %r1
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; %20 = COPY %x2
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; STD %20, 24, %x1 :: (store 8 into stack + 24)
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; %21 = EXTSW_32_64 %1
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; %x3 = COPY %21
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; %x12 = COPY %4
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; MTCTR8 %4, implicit-def %ctr8
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; BCTRL8_LDinto_toc 24, %x1, csr_svr464_altivec, implicit-def dead %lr8, implicit-def dead %x2, implicit %ctr8, implicit %rm, implicit %x3, implicit %x12, implicit %x2, implicit-def %r1, implicit-def %x3
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; ADJCALLSTACKUP 32, 0, implicit-def dead %r1, implicit %r1
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; %22 = COPY %x3
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; %x3 = COPY %22
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; BLR8 implicit %lr8, implicit %rm, implicit %x3
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;
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; bb.3.if.end:
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; successors: %bb.2.if.then(0x04000000), %bb.3.if.end(0x7c000000)
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;
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; %2 = PHI %0, %bb.0.entry, %3, %bb.3.if.end
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; %12 = ADDI %2, 1
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; %13 = ADDIStocHA %x2, @ga
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; %14 = LDtocL @ga, killed %13 :: (load 8 from got)
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; STW killed %12, 0, %14 :: (volatile store 4 into @ga)
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; %15 = LWZ 0, %14 :: (volatile dereferenceable load 4 from @ga)
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; %16 = ADDIStocHA %x2, @gb
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; %17 = LDtocL @gb, killed %16 :: (load 8 from got)
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; %18 = LWZ 0, killed %17 :: (volatile dereferenceable load 4 from @gb)
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; %3 = LWZ 0, %14 :: (volatile dereferenceable load 4 from @ga)
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; %19 = CMPW killed %15, killed %18
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; BCC 44, killed %19, %bb.2.if.then
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; B %bb.3.if.end
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@ga = external global i32, align 4
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@gb = external global i32, align 4
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; Function Attrs: nounwind
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define signext i32 @test(i32 (i32)* nocapture %FP) local_unnamed_addr #0 {
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; CHECK-LABEL: test:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: addis 4, 2, .LC0@toc@ha
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; CHECK-NEXT: addis 5, 2, .LC1@toc@ha
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; CHECK-NEXT: ld 4, .LC0@toc@l(4)
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; CHECK-NEXT: ld 5, .LC1@toc@l(5)
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; CHECK-NEXT: lwz 6, 0(4)
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; CHECK-NEXT: lwz 5, 0(5)
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; CHECK-NEXT: cmpw 6, 5
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; CHECK-NEXT: lwz 5, 0(4)
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; CHECK-NEXT: mr 4, 3
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; CHECK-NEXT: bgt 0, .LBB0_3
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; CHECK-NEXT: # BB#1:
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; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
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; CHECK-NEXT: addis 6, 2, .LC1@toc@ha
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; CHECK-NEXT: ld 3, .LC0@toc@l(3)
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; CHECK-NEXT: ld 6, .LC1@toc@l(6)
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; CHECK-NEXT: .p2align 5
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; CHECK-NEXT: .LBB0_2: # %if.end
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; CHECK-NOT: addis {{[0-9]+}}, 2, .LC0@toc@ha
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; CHECK-NOT: addis {{[0-9]+}}, 2, .LC1@toc@ha
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; CHECK: blr
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entry:
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%0 = load volatile i32, i32* @ga, align 4
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%1 = load volatile i32, i32* @gb, align 4
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%cmp1 = icmp sgt i32 %0, %1
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%2 = load volatile i32, i32* @ga, align 4
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br i1 %cmp1, label %if.then, label %if.end
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if.then: ; preds = %if.end, %entry
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%.lcssa = phi i32 [ %2, %entry ], [ %6, %if.end ]
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%call = tail call signext i32 %FP(i32 signext %.lcssa) #1
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ret i32 %call
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if.end: ; preds = %entry, %if.end
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%3 = phi i32 [ %6, %if.end ], [ %2, %entry ]
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%inc = add nsw i32 %3, 1
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store volatile i32 %inc, i32* @ga, align 4
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%4 = load volatile i32, i32* @ga, align 4
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%5 = load volatile i32, i32* @gb, align 4
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%cmp = icmp sgt i32 %4, %5
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%6 = load volatile i32, i32* @ga, align 4
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br i1 %cmp, label %if.then, label %if.end
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}
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