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4f7d404ed1
This is NFC after rerunning the "update_llc_test_checks.py" tool on the CodeGen X86 tests in order to submit a patch. Minor differences due to added "End of Function" lines. Reviewers: zvi Differential Revision: https://reviews.llvm.org/D34933 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306973 91177308-0d34-0410-b5e6-96231b3b80d8
195 lines
4.9 KiB
LLVM
195 lines
4.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=ALL --check-prefix=KNL
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=ALL --check-prefix=SKX
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define double @test1(double %a, double %b) nounwind {
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; ALL-LABEL: test1:
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; ALL: ## BB#0:
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; ALL-NEXT: vucomisd %xmm1, %xmm0
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; ALL-NEXT: jne LBB0_1
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; ALL-NEXT: jnp LBB0_2
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; ALL-NEXT: LBB0_1: ## %l1
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; ALL-NEXT: vsubsd %xmm1, %xmm0, %xmm0
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; ALL-NEXT: retq
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; ALL-NEXT: LBB0_2: ## %l2
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; ALL-NEXT: vaddsd %xmm1, %xmm0, %xmm0
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; ALL-NEXT: retq
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; ALL-NEXT: ## -- End function
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%tobool = fcmp une double %a, %b
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br i1 %tobool, label %l1, label %l2
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l1:
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%c = fsub double %a, %b
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ret double %c
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l2:
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%c1 = fadd double %a, %b
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ret double %c1
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}
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define float @test2(float %a, float %b) nounwind {
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; ALL-LABEL: test2:
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; ALL: ## BB#0:
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; ALL-NEXT: vucomiss %xmm0, %xmm1
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; ALL-NEXT: jbe LBB1_2
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; ALL-NEXT: ## BB#1: ## %l1
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; ALL-NEXT: vsubss %xmm1, %xmm0, %xmm0
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; ALL-NEXT: retq
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; ALL-NEXT: LBB1_2: ## %l2
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; ALL-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; ALL-NEXT: retq
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; ALL-NEXT: ## -- End function
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%tobool = fcmp olt float %a, %b
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br i1 %tobool, label %l1, label %l2
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l1:
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%c = fsub float %a, %b
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ret float %c
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l2:
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%c1 = fadd float %a, %b
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ret float %c1
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}
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define i32 @test3(float %a, float %b) {
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; KNL-LABEL: test3:
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; KNL: ## BB#0:
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; KNL-NEXT: vcmpeqss %xmm1, %xmm0, %k0
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; KNL-NEXT: kmovw %k0, %eax
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; KNL-NEXT: movzbl %al, %eax
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; KNL-NEXT: retq
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;
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; SKX-LABEL: test3:
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; SKX: ## BB#0:
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; SKX-NEXT: vcmpeqss %xmm1, %xmm0, %k0
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; SKX-NEXT: kmovd %k0, %eax
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; SKX-NEXT: movzbl %al, %eax
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; SKX-NEXT: retq
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%cmp10.i = fcmp oeq float %a, %b
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%conv11.i = zext i1 %cmp10.i to i32
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ret i32 %conv11.i
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}
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define float @test5(float %p) #0 {
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; ALL-LABEL: test5:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; ALL-NEXT: vucomiss %xmm1, %xmm0
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; ALL-NEXT: jne LBB3_1
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; ALL-NEXT: jp LBB3_1
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; ALL-NEXT: ## BB#2: ## %return
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; ALL-NEXT: retq
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; ALL-NEXT: LBB3_1: ## %if.end
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; ALL-NEXT: seta %al
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; ALL-NEXT: movzbl %al, %eax
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; ALL-NEXT: leaq {{.*}}(%rip), %rcx
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; ALL-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; ALL-NEXT: retq
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entry:
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%cmp = fcmp oeq float %p, 0.000000e+00
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br i1 %cmp, label %return, label %if.end
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if.end: ; preds = %entry
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%cmp1 = fcmp ogt float %p, 0.000000e+00
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%cond = select i1 %cmp1, float 1.000000e+00, float -1.000000e+00
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br label %return
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return: ; preds = %if.end, %entry
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%retval.0 = phi float [ %cond, %if.end ], [ %p, %entry ]
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ret float %retval.0
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}
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define i32 @test6(i32 %a, i32 %b) {
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; ALL-LABEL: test6:
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; ALL: ## BB#0:
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; ALL-NEXT: xorl %eax, %eax
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; ALL-NEXT: cmpl %esi, %edi
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; ALL-NEXT: sete %al
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; ALL-NEXT: retq
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%cmp = icmp eq i32 %a, %b
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%res = zext i1 %cmp to i32
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ret i32 %res
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}
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define i32 @test7(double %x, double %y) #2 {
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; ALL-LABEL: test7:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: xorl %eax, %eax
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; ALL-NEXT: vucomisd %xmm1, %xmm0
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; ALL-NEXT: setne %al
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; ALL-NEXT: retq
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entry:
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%0 = fcmp one double %x, %y
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%or = zext i1 %0 to i32
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ret i32 %or
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}
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define i32 @test8(i32 %a1, i32 %a2, i32 %a3) {
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; ALL-LABEL: test8:
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; ALL: ## BB#0:
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; ALL-NEXT: notl %edi
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; ALL-NEXT: xorl $-2147483648, %esi ## imm = 0x80000000
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; ALL-NEXT: testl %edx, %edx
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; ALL-NEXT: movl $1, %eax
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; ALL-NEXT: cmovel %eax, %edx
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; ALL-NEXT: orl %edi, %esi
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; ALL-NEXT: cmovnel %edx, %eax
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; ALL-NEXT: retq
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%tmp1 = icmp eq i32 %a1, -1
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%tmp2 = icmp eq i32 %a2, -2147483648
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%tmp3 = and i1 %tmp1, %tmp2
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%tmp4 = icmp eq i32 %a3, 0
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%tmp5 = or i1 %tmp3, %tmp4
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%res = select i1 %tmp5, i32 1, i32 %a3
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ret i32 %res
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}
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define i32 @test9(i64 %a) {
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; ALL-LABEL: test9:
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; ALL: ## BB#0:
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; ALL-NEXT: testb $1, %dil
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; ALL-NEXT: jne LBB7_2
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; ALL-NEXT: ## BB#1: ## %A
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; ALL-NEXT: movl $6, %eax
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; ALL-NEXT: retq
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; ALL-NEXT: LBB7_2: ## %B
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; ALL-NEXT: movl $7, %eax
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; ALL-NEXT: retq
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%b = and i64 %a, 1
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%cmp10.i = icmp eq i64 %b, 0
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br i1 %cmp10.i, label %A, label %B
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A:
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ret i32 6
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B:
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ret i32 7
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}
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define i32 @test10(i64 %b, i64 %c, i1 %d) {
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; ALL-LABEL: test10:
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; ALL: ## BB#0:
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; ALL-NEXT: movl %edx, %eax
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; ALL-NEXT: andb $1, %al
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; ALL-NEXT: cmpq %rsi, %rdi
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; ALL-NEXT: sete %cl
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; ALL-NEXT: orb %dl, %cl
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; ALL-NEXT: andb $1, %cl
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; ALL-NEXT: cmpb %cl, %al
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; ALL-NEXT: je LBB8_1
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; ALL-NEXT: ## BB#2: ## %if.end.i
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; ALL-NEXT: movl $6, %eax
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; ALL-NEXT: retq
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; ALL-NEXT: LBB8_1: ## %if.then.i
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; ALL-NEXT: movl $5, %eax
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; ALL-NEXT: retq
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%cmp8.i = icmp eq i64 %b, %c
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%or1 = or i1 %d, %cmp8.i
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%xor1 = xor i1 %d, %or1
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br i1 %xor1, label %if.end.i, label %if.then.i
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if.then.i:
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ret i32 5
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if.end.i:
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ret i32 6
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}
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