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ed541fe200
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250407 91177308-0d34-0410-b5e6-96231b3b80d8
21 lines
677 B
LLVM
21 lines
677 B
LLVM
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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@i = global i32 97, align 4
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@c = common global i8 0, align 1
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@.str = private unnamed_addr constant [8 x i8] c"%i %c \0A\00", align 1
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define i32 @main() nounwind {
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entry:
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%0 = load i32, i32* @i, align 4
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%conv = trunc i32 %0 to i8
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store i8 %conv, i8* @c, align 1
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%1 = load i32, i32* @i, align 4
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%2 = load i8, i8* @c, align 1
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%conv1 = sext i8 %2 to i32
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; 16: sb ${{[0-9]+}}, 0(${{[0-9]+}})
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%call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i32 0, i32 0), i32 %1, i32 %conv1)
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ret i32 0
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}
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declare i32 @printf(i8*, ...)
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