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ed541fe200
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250407 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
1.7 KiB
LLVM
42 lines
1.7 KiB
LLVM
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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@.str = private unnamed_addr constant [8 x i8] c"%d, %d\0A\00", align 1
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define i32 @foo(i32* %mem, i32 %val, i32 %c) nounwind {
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entry:
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%0 = atomicrmw add i32* %mem, i32 %val seq_cst
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%add = add nsw i32 %0, %c
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ret i32 %add
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; 16-LABEL: foo:
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; 16: lw ${{[0-9]+}}, %call16(__sync_synchronize)(${{[0-9]+}})
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; 16: lw ${{[0-9]+}}, %call16(__sync_fetch_and_add_4)(${{[0-9]+}})
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}
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define i32 @main() nounwind {
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entry:
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%x = alloca i32, align 4
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store volatile i32 0, i32* %x, align 4
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%0 = atomicrmw add i32* %x, i32 1 seq_cst
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%add.i = add nsw i32 %0, 2
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%1 = load volatile i32, i32* %x, align 4
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%call1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i32 0, i32 0), i32 %add.i, i32 %1) nounwind
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%pair = cmpxchg i32* %x, i32 1, i32 2 seq_cst seq_cst
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%2 = extractvalue { i32, i1 } %pair, 0
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%3 = load volatile i32, i32* %x, align 4
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%call2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i32 0, i32 0), i32 %2, i32 %3) nounwind
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%4 = atomicrmw xchg i32* %x, i32 1 seq_cst
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%5 = load volatile i32, i32* %x, align 4
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%call3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i32 0, i32 0), i32 %4, i32 %5) nounwind
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; 16-LABEL: main:
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; 16: lw ${{[0-9]+}}, %call16(__sync_synchronize)(${{[0-9]+}})
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; 16: lw ${{[0-9]+}}, %call16(__sync_fetch_and_add_4)(${{[0-9]+}})
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; 16: lw ${{[0-9]+}}, %call16(__sync_val_compare_and_swap_4)(${{[0-9]+}})
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; 16: lw ${{[0-9]+}}, %call16(__sync_lock_test_and_set_4)(${{[0-9]+}})
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ret i32 0
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}
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declare i32 @printf(i8* nocapture, ...) nounwind
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