Misha Brukman 3ada3e3f82 ADDI can take several forms, including: ...

addi r1, r2, 0
  addi r1, <frame index #n>, 0

so we must check for the second parameter being a register for this instruction
to be considered a reg-to-reg copy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15244 91177308-0d34-0410-b5e6-96231b3b80d8

2004-07-26 21:50:38 +00:00

..

CBackend

Temporarily disable this code, as it is emitting LLVM_NAN("nan") which results in a call to the

2004-07-25 22:36:35 +00:00

PowerPC

ADDI can take several forms, including:

2004-07-26 21:50:38 +00:00

Skeleton

Fix grammar.

2004-07-16 17:40:28 +00:00

Sparc

I think that V8 should coallesce registers, don't you?

2004-07-25 06:19:04 +00:00

SparcV8

I think that V8 should coallesce registers, don't you?

2004-07-25 06:19:04 +00:00

SparcV9

These files don't need to include <iostream> since they include "Support/Debug.h".

2004-07-21 20:50:33 +00:00

X86

Fix indentation: should be 2 spaces.

2004-07-26 18:48:58 +00:00

Makefile

Build the skeleton target

2004-07-16 07:11:53 +00:00

MRegisterInfo.cpp

Put all LLVM code into the llvm namespace, as per bug 109.

2003-11-11 22:41:34 +00:00

Target.td

Expose the "Other" value type to tablegen targets

2004-02-11 03:08:45 +00:00

TargetData.cpp

* Add BoolAlignment to TargetData, default is 1 byte, size 1 byte

2004-07-23 01:09:52 +00:00

TargetFrameInfo.cpp

Move implementations of functions here, which avoids #including <cstdlib> in the

2004-03-11 23:52:43 +00:00

TargetInstrInfo.cpp

Adjust to change in TII ctor arguments

2004-02-29 06:31:44 +00:00

TargetMachine.cpp

* Add BoolAlignment to TargetData, default is 1 byte, size 1 byte

2004-07-23 01:09:52 +00:00

TargetMachineRegistry.cpp

Implement TargetRegistrationListener

2004-07-11 06:03:21 +00:00

TargetSchedInfo.cpp

Adjust to new TM interface

2004-06-02 05:56:04 +00:00