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3be03406c9
Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77918 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
1.3 KiB
C++
42 lines
1.3 KiB
C++
//===-- XCoreTargetMachine.cpp - Define TargetMachine for XCore -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "XCoreTargetAsmInfo.h"
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#include "XCoreTargetMachine.h"
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#include "XCore.h"
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#include "llvm/Module.h"
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#include "llvm/PassManager.h"
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using namespace llvm;
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const TargetAsmInfo *XCoreTargetMachine::createTargetAsmInfo() const {
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return new XCoreTargetAsmInfo();
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}
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/// XCoreTargetMachine ctor - Create an ILP32 architecture model
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///
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XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Module &M,
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const std::string &FS)
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: LLVMTargetMachine(T),
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Subtarget(M.getTargetTriple(), FS),
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DataLayout("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-"
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"i16:16:32-i32:32:32-i64:32:32"),
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InstrInfo(),
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FrameInfo(*this),
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TLInfo(*this) {
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}
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bool XCoreTargetMachine::addInstSelector(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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PM.add(createXCoreISelDag(*this));
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return false;
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}
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