llvm/test/MC/Disassembler/PowerPC/dcbt.txt
Hal Finkel 79f43b2736 [PowerPC] Add asm/disasm support for dcbt with hint
Add assembler/disassembler support for dcbt/dcbtst (and aliases) with the hint
field specified (non-zero). Unforunately, the syntax for this instruction is
special in that it differs for server vs. embedded cores:
   dcbt ra, rb, th [server]
   dcbt th, ra, rb [embedded]
where th can be omitted when it is 0. dcbtst is the same. Thus we need to play
games in the parser and the printer to flip the operands around on the embedded
cores. We'll use the server syntax as the default (binutils currently uses the
embedded form by default, but IBM is changing that).

We also stop marking dcbtst as having unmodeled side effects (this is not
necessary, it is just a hint like dcbt -- noticed by inspection, so no separate
test case).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235657 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-23 22:47:57 +00:00

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# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s -check-prefix=SERVER
# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=a2 | FileCheck %s -check-prefix=EMBEDDED
# SERVER: dcbt 2, 3
# EMBEDDED: dcbt 2, 3
0x7c 0x02 0x1a 0x2c
# SERVER: dcbtst 2, 3
# EMBEDDED: dcbtst 2, 3
0x7c 0x02 0x19 0xec
# SERVER: dcbt 2, 3, 10
# EMBEDDED: dcbt 10, 2, 3
0x7d 0x42 0x1a 0x2c
# SERVER: dcbtst 2, 3, 10
# EMBEDDED: dcbtst 10, 2, 3
0x7d 0x42 0x19 0xec