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a6c37a901a
Commit in the name of:Coby Tayree
1.'v' constraint for (x86) non-avx arch imitates the already implemented 'x' constraint, i.e. allows XMM{0-15} & YMM{0-15} depending on the apparent arch & mode (32/64).
2.for the avx512 arch it allows [X,Y,Z]MM{0-31} (mode dependent)
This patch applies the needed changes to clang
clang patch: https://reviews.llvm.org/D25004
Differential Revision: D25005
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283717 91177308-0d34-0410-b5e6-96231b3b80d8
73 lines
2.5 KiB
LLVM
73 lines
2.5 KiB
LLVM
; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s
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define <16 x float> @testZMM_1(<16 x float> %_zmm0, <16 x float> %_zmm1) {
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entry:
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; CHECK: vpternlogd $0, %zmm1, %zmm0, %zmm0
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%0 = tail call <16 x float> asm "vpternlogd $$0, $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm0)
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ret <16 x float> %0
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}
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define <16 x float> @testZMM_2(<16 x float> %_zmm0, <16 x float> %_zmm1) {
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entry:
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; CHECK: vpabsq %zmm1, %zmm0
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%0 = tail call <16 x float> asm "vpabsq $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1)
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ret <16 x float> %0
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}
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define <16 x float> @testZMM_3(<16 x float> %_zmm0, <16 x float> %_zmm1) {
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entry:
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; CHECK: vpaddd %zmm1, %zmm1, %zmm0
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%0 = tail call <16 x float> asm "vpaddd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
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ret <16 x float> %0
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}
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define <16 x float> @testZMM_4(<16 x float> %_zmm0, <16 x float> %_zmm1) {
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entry:
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; CHECK: vpaddq %zmm1, %zmm1, %zmm0
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%0 = tail call <16 x float> asm "vpaddq $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
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ret <16 x float> %0
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}
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define <16 x float> @testZMM_5(<16 x float> %_zmm0, <16 x float> %_zmm1) {
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entry:
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; CHECK: vpandd %zmm1, %zmm1, %zmm0
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%0 = tail call <16 x float> asm "vpandd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
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ret <16 x float> %0
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}
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define <16 x float> @testZMM_6(<16 x float> %_zmm0, <16 x float> %_zmm1) {
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entry:
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; CHECK: vpandnd %zmm1, %zmm1, %zmm0
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%0 = tail call <16 x float> asm "vpandnd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
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ret <16 x float> %0
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}
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define <16 x float> @testZMM_7(<16 x float> %_zmm0, <16 x float> %_zmm1) {
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entry:
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; CHECK: vpmaxsd %zmm1, %zmm1, %zmm0
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%0 = tail call <16 x float> asm "vpmaxsd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
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ret <16 x float> %0
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}
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define <16 x float> @testZMM_8(<16 x float> %_zmm0, <16 x float> %_zmm1) {
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entry:
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; CHECK: vmovups %zmm1, %zmm0
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%0 = tail call <16 x float> asm "vmovups $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1)
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ret <16 x float> %0
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}
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define <16 x float> @testZMM_9(<16 x float> %_zmm0, <16 x float> %_zmm1) {
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entry:
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; CHECK: vmovupd %zmm1, %zmm0
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%0 = tail call <16 x float> asm "vmovupd $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1)
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ret <16 x float> %0
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}
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