Yi Kong 40f9d11ccc ARM: Fix codegen for rbit intrinsic ...

LLVM generates illegal `rbit r0, #352` instruction for rbit intrinsic.
According to ARM ARM, rbit only takes register as argument, not immediate.
The correct instruction should be rbit <Rd>, <Rm>.

The bug was originally introduced in r211057.

Differential Revision: http://reviews.llvm.org/D4980

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216064 91177308-0d34-0410-b5e6-96231b3b80d8

2014-08-20 10:40:20 +00:00

..

AArch64

ARM: Fix codegen for rbit intrinsic

2014-08-20 10:40:20 +00:00

ARM

ARM: Fix codegen for rbit intrinsic

2014-08-20 10:40:20 +00:00

CPP

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Generic

Use "weak alias" instead of "alias weak"

2014-07-30 22:51:54 +00:00

Hexagon

DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.

2014-08-06 00:21:25 +00:00

Inputs

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Mips

Fix fmul combines with constant splat vectors

2014-08-16 10:14:19 +00:00

MSP430

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NVPTX

[NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types

2014-07-23 20:23:49 +00:00

PowerPC

Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588).

2014-08-19 19:05:24 +00:00

R600

R600/SI: Move all fabs / fneg handling to patterns

2014-08-15 18:42:22 +00:00

SPARC

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SystemZ

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Thumb

ARM: Fix and re-enable load/store optimizer for Thumb1.

2014-08-15 17:00:30 +00:00

Thumb2

ARM: do not generate BLX instructions on Cortex-M CPUs.

2014-08-06 11:13:14 +00:00

X86

Reapply [FastISel][X86] Add large code model support for materializing floating-point constants (r215595).

2014-08-19 19:44:13 +00:00

XCore

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