llvm/test/CodeGen
Simon Pilgrim c5c4d22d26 [X86][AVX] Improved VPERMILPS variable shuffle mask decoding.
Added support for decoding VPERMILPS variable shuffle masks that aren't in the constant pool.

Added target shuffle mask decoding for SCALAR_TO_VECTOR+VZEXT_MOVL cases - these can happen for v2i64 constant re-materialization

Followup to D17681

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262784 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-05 22:53:31 +00:00
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AArch64 [AArch64] fold 'isPositive' vector integer operations (PR26819) 2016-03-03 15:56:08 +00:00
AMDGPU RegisterCoalescer: Remap subregister lanemasks before exchanging operands 2016-03-05 04:36:13 +00:00
ARM [ARM] Merging 64-bit divmod lib calls into one 2016-03-04 19:19:36 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips [mips][microMIPS] Prevent usage of OR16_MMR6 instruction when code for microMIPS is generated. 2016-03-04 17:34:31 +00:00
MIR
MSP430
NVPTX
PowerPC
SPARC
SystemZ
Thumb
Thumb2
WebAssembly
WinEH
X86 [X86][AVX] Improved VPERMILPS variable shuffle mask decoding. 2016-03-05 22:53:31 +00:00
XCore