Renato Golin 418103c4d4 Missing test from r216989 ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216990 91177308-0d34-0410-b5e6-96231b3b80d8

2014-09-02 22:46:18 +00:00

..

AArch64

[FastISel][AArch64] Use the target-dependent selection code for shifts first.

2014-09-02 22:33:57 +00:00

ARM

Missing test from r216989

2014-09-02 22:46:18 +00:00

CPP

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Generic

Use "weak alias" instead of "alias weak"

2014-07-30 22:51:54 +00:00

Hexagon

DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.

2014-08-06 00:21:25 +00:00

Inputs

Debug Info: update testing cases to specify the debug info version number.

2013-11-22 21:49:45 +00:00

Mips

Replace -use-init-array with -use-ctors.

2014-09-02 13:54:53 +00:00

MSP430

Do not assume the value passed to memset is an i32.

2014-08-29 08:23:53 +00:00

NVPTX

[MachineSink] Use the real post dominator tree

2014-09-01 03:47:25 +00:00

PowerPC

Enable splitting indexing from loads with TargetConstants

2014-09-02 16:05:23 +00:00

R600

R600/SI: Relax some ordering in tests.

2014-09-02 21:45:50 +00:00

SPARC

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

SystemZ

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Thumb

ARM / x86_64 varargs: Don't save regparms in prologue without va_start

2014-08-22 21:59:26 +00:00

Thumb2

ARM / x86_64 varargs: Don't save regparms in prologue without va_start

2014-08-22 21:59:26 +00:00

X86

[X86] Allow atomic operations using immediates to avoid using a register

2014-09-02 22:16:29 +00:00

XCore

llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.

2014-07-04 11:58:03 +00:00