llvm/test/Transforms/SimplifyCFG/switch-masked-bits.ll
Sanjay Patel f5a8ebbd97 [SimplifyCFG] eliminate switch cases based on known range of switch condition
This was noted in PR24766:
https://llvm.org/bugs/show_bug.cgi?id=24766#c2

We may not know whether the sign bit(s) are zero or one, but we can still
optimize based on knowing that the sign bit is repeated.

Differential Revision: http://reviews.llvm.org/D20275



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270222 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 14:53:09 +00:00

78 lines
1.5 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -simplifycfg < %s | FileCheck %s
define i32 @test1(i32 %x) nounwind {
; CHECK-LABEL: @test1(
; CHECK-NEXT: a:
; CHECK-NEXT: [[I:%.*]] = shl i32 %x, 1
; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I]], 24
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[COND]], i32 5, i32 0
; CHECK-NEXT: ret i32 [[DOT]]
;
%i = shl i32 %x, 1
switch i32 %i, label %a [
i32 21, label %b
i32 24, label %c
]
a:
ret i32 0
b:
ret i32 3
c:
ret i32 5
}
define i32 @test2(i32 %x) nounwind {
; CHECK-LABEL: @test2(
; CHECK-NEXT: a:
; CHECK-NEXT: ret i32 0
;
%i = shl i32 %x, 1
switch i32 %i, label %a [
i32 21, label %b
i32 23, label %c
]
a:
ret i32 0
b:
ret i32 3
c:
ret i32 5
}
; We're sign extending an 8-bit value.
; The switch condition must be in the range [-128, 127], so any cases outside of that range must be dead.
define i1 @repeated_signbits(i8 %condition) {
; CHECK-LABEL: @repeated_signbits(
; CHECK: switch i32
; CHECK-DAG: i32 -128, label %a
; CHECK-DAG: i32 -1, label %a
; CHECK-DAG: i32 0, label %a
; CHECK-DAG: i32 127, label %a
; CHECK-NEXT: ]
;
entry:
%sext = sext i8 %condition to i32
switch i32 %sext, label %default [
i32 -2147483648, label %a
i32 -129, label %a
i32 -128, label %a
i32 -1, label %a
i32 0, label %a
i32 127, label %a
i32 128, label %a
i32 2147483647, label %a
]
a:
ret i1 1
default:
ret i1 0
}