Tim Northover 7763f74f8a AArch64: remove CRC feature from Cyclone. ...

Turns out we don't actually support those instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261759 91177308-0d34-0410-b5e6-96231b3b80d8

2016-02-24 18:10:17 +00:00

..

AArch64

AArch64: remove CRC feature from Cyclone.

2016-02-24 18:10:17 +00:00

AMDGPU

[AMDGPU] Fix operands of S_BFE_U64 and S_BFM_B64

2016-02-23 09:19:14 +00:00

ARM

ARM: fix handling of movw/movt relocations with addend.

2016-02-23 20:20:23 +00:00

AsmParser

[MC] Fixed parsing of macro arguments where expressions with spaces are present.

2016-02-11 13:48:49 +00:00

COFF

[codeview] Dump def range lengths in hex

2016-02-11 23:40:14 +00:00

Disassembler

[X86] Add some missing reversed forms of XOP instructions.

2016-02-20 06:20:17 +00:00

ELF

Accept subtractions involving a weak symbol.

2016-01-20 18:57:48 +00:00

Hexagon

[Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding.

2016-02-16 20:38:17 +00:00

MachO

Form reform for MCDwarf.

2015-12-23 01:57:31 +00:00

Markup

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Mips

[mips] added support for trunc macro

2016-02-22 16:00:23 +00:00

PowerPC

[MC] Merge VK_PPC_TPREL in to generic VK_TPREL.

2016-02-10 18:32:01 +00:00

Sparc

[SPARC] Repair floating-point condition encodings in assembly parser.

2016-02-10 17:47:20 +00:00

SystemZ

[SystemZ] Sort relocs to avoid code corruption by linker optimization

2015-12-16 18:12:40 +00:00

X86

AVX512F: Add assembler Intel syntax tests for knl, fix minor bugs.

2016-02-22 12:37:41 +00:00