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X86EvexToVex machine instruction pass compresses EVEX encoded instructions by replacing them with their identical VEX encoded instructions when possible. It uses manually supported 2 large tables that map the EVEX instructions to their VEX ideticals. This TableGen backend replaces the tables by automatically generating them. Differential Revision: https://reviews.llvm.org/D30451 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297127 91177308-0d34-0410-b5e6-96231b3b80d8
435 lines
13 KiB
ReStructuredText
435 lines
13 KiB
ReStructuredText
=================
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TableGen BackEnds
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=================
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.. contents::
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:local:
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Introduction
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============
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TableGen backends are at the core of TableGen's functionality. The source files
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provide the semantics to a generated (in memory) structure, but it's up to the
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backend to print this out in a way that is meaningful to the user (normally a
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C program including a file or a textual list of warnings, options and error
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messages).
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TableGen is used by both LLVM and Clang with very different goals. LLVM uses it
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as a way to automate the generation of massive amounts of information regarding
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instructions, schedules, cores and architecture features. Some backends generate
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output that is consumed by more than one source file, so they need to be created
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in a way that is easy to use pre-processor tricks. Some backends can also print
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C code structures, so that they can be directly included as-is.
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Clang, on the other hand, uses it mainly for diagnostic messages (errors,
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warnings, tips) and attributes, so more on the textual end of the scale.
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LLVM BackEnds
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=============
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.. warning::
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This document is raw. Each section below needs three sub-sections: description
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of its purpose with a list of users, output generated from generic input, and
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finally why it needed a new backend (in case there's something similar).
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Overall, each backend will take the same TableGen file type and transform into
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similar output for different targets/uses. There is an implicit contract between
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the TableGen files, the back-ends and their users.
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For instance, a global contract is that each back-end produces macro-guarded
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sections. Based on whether the file is included by a header or a source file,
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or even in which context of each file the include is being used, you have
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todefine a macro just before including it, to get the right output:
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.. code-block:: c++
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#define GET_REGINFO_TARGET_DESC
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#include "ARMGenRegisterInfo.inc"
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And just part of the generated file would be included. This is useful if
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you need the same information in multiple formats (instantiation, initialization,
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getter/setter functions, etc) from the same source TableGen file without having
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to re-compile the TableGen file multiple times.
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Sometimes, multiple macros might be defined before the same include file to
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output multiple blocks:
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.. code-block:: c++
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#define GET_REGISTER_MATCHER
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#define GET_SUBTARGET_FEATURE_NAME
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#define GET_MATCHER_IMPLEMENTATION
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#include "ARMGenAsmMatcher.inc"
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The macros will be undef'd automatically as they're used, in the include file.
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On all LLVM back-ends, the ``llvm-tblgen`` binary will be executed on the root
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TableGen file ``<Target>.td``, which should include all others. This guarantees
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that all information needed is accessible, and that no duplication is needed
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in the TableGen files.
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CodeEmitter
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-----------
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**Purpose**: CodeEmitterGen uses the descriptions of instructions and their fields to
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construct an automated code emitter: a function that, given a MachineInstr,
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returns the (currently, 32-bit unsigned) value of the instruction.
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**Output**: C++ code, implementing the target's CodeEmitter
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class by overriding the virtual functions as ``<Target>CodeEmitter::function()``.
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**Usage**: Used to include directly at the end of ``<Target>MCCodeEmitter.cpp``.
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RegisterInfo
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------------
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**Purpose**: This tablegen backend is responsible for emitting a description of a target
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register file for a code generator. It uses instances of the Register,
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RegisterAliases, and RegisterClass classes to gather this information.
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**Output**: C++ code with enums and structures representing the register mappings,
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properties, masks, etc.
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**Usage**: Both on ``<Target>BaseRegisterInfo`` and ``<Target>MCTargetDesc`` (headers
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and source files) with macros defining in which they are for declaration vs.
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initialization issues.
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InstrInfo
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---------
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**Purpose**: This tablegen backend is responsible for emitting a description of the target
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instruction set for the code generator. (what are the differences from CodeEmitter?)
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**Output**: C++ code with enums and structures representing the instruction mappings,
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properties, masks, etc.
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**Usage**: Both on ``<Target>BaseInstrInfo`` and ``<Target>MCTargetDesc`` (headers
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and source files) with macros defining in which they are for declaration vs.
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initialization issues.
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AsmWriter
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---------
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**Purpose**: Emits an assembly printer for the current target.
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**Output**: Implementation of ``<Target>InstPrinter::printInstruction()``, among
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other things.
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**Usage**: Included directly into ``InstPrinter/<Target>InstPrinter.cpp``.
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AsmMatcher
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----------
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**Purpose**: Emits a target specifier matcher for
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converting parsed assembly operands in the MCInst structures. It also
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emits a matcher for custom operand parsing. Extensive documentation is
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written on the ``AsmMatcherEmitter.cpp`` file.
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**Output**: Assembler parsers' matcher functions, declarations, etc.
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**Usage**: Used in back-ends' ``AsmParser/<Target>AsmParser.cpp`` for
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building the AsmParser class.
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Disassembler
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------------
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**Purpose**: Contains disassembler table emitters for various
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architectures. Extensive documentation is written on the
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``DisassemblerEmitter.cpp`` file.
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**Output**: Decoding tables, static decoding functions, etc.
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**Usage**: Directly included in ``Disassembler/<Target>Disassembler.cpp``
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to cater for all default decodings, after all hand-made ones.
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PseudoLowering
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--------------
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**Purpose**: Generate pseudo instruction lowering.
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**Output**: Implements ``<Target>AsmPrinter::emitPseudoExpansionLowering()``.
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**Usage**: Included directly into ``<Target>AsmPrinter.cpp``.
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CallingConv
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-----------
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**Purpose**: Responsible for emitting descriptions of the calling
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conventions supported by this target.
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**Output**: Implement static functions to deal with calling conventions
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chained by matching styles, returning false on no match.
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**Usage**: Used in ISelLowering and FastIsel as function pointers to
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implementation returned by a CC selection function.
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DAGISel
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-------
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**Purpose**: Generate a DAG instruction selector.
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**Output**: Creates huge functions for automating DAG selection.
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**Usage**: Included in ``<Target>ISelDAGToDAG.cpp`` inside the target's
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implementation of ``SelectionDAGISel``.
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DFAPacketizer
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-------------
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**Purpose**: This class parses the Schedule.td file and produces an API that
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can be used to reason about whether an instruction can be added to a packet
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on a VLIW architecture. The class internally generates a deterministic finite
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automaton (DFA) that models all possible mappings of machine instructions
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to functional units as instructions are added to a packet.
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**Output**: Scheduling tables for GPU back-ends (Hexagon, AMD).
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**Usage**: Included directly on ``<Target>InstrInfo.cpp``.
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FastISel
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--------
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**Purpose**: This tablegen backend emits code for use by the "fast"
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instruction selection algorithm. See the comments at the top of
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lib/CodeGen/SelectionDAG/FastISel.cpp for background. This file
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scans through the target's tablegen instruction-info files
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and extracts instructions with obvious-looking patterns, and it emits
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code to look up these instructions by type and operator.
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**Output**: Generates ``Predicate`` and ``FastEmit`` methods.
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**Usage**: Implements private methods of the targets' implementation
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of ``FastISel`` class.
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Subtarget
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---------
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**Purpose**: Generate subtarget enumerations.
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**Output**: Enums, globals, local tables for sub-target information.
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**Usage**: Populates ``<Target>Subtarget`` and
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``MCTargetDesc/<Target>MCTargetDesc`` files (both headers and source).
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Intrinsic
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---------
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**Purpose**: Generate (target) intrinsic information.
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OptParserDefs
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-------------
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**Purpose**: Print enum values for a class.
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CTags
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-----
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**Purpose**: This tablegen backend emits an index of definitions in ctags(1)
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format. A helper script, utils/TableGen/tdtags, provides an easier-to-use
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interface; run 'tdtags -H' for documentation.
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X86EVEX2VEX
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-----------
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**Purpose**: This X86 specific tablegen backend emits tables that map EVEX
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encoded instructions to their VEX encoded identical instruction.
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Clang BackEnds
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==============
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ClangAttrClasses
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----------------
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**Purpose**: Creates Attrs.inc, which contains semantic attribute class
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declarations for any attribute in ``Attr.td`` that has not set ``ASTNode = 0``.
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This file is included as part of ``Attr.h``.
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ClangAttrParserStringSwitches
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-----------------------------
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**Purpose**: Creates AttrParserStringSwitches.inc, which contains
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StringSwitch::Case statements for parser-related string switches. Each switch
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is given its own macro (such as ``CLANG_ATTR_ARG_CONTEXT_LIST``, or
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``CLANG_ATTR_IDENTIFIER_ARG_LIST``), which is expected to be defined before
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including AttrParserStringSwitches.inc, and undefined after.
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ClangAttrImpl
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-------------
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**Purpose**: Creates AttrImpl.inc, which contains semantic attribute class
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definitions for any attribute in ``Attr.td`` that has not set ``ASTNode = 0``.
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This file is included as part of ``AttrImpl.cpp``.
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ClangAttrList
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-------------
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**Purpose**: Creates AttrList.inc, which is used when a list of semantic
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attribute identifiers is required. For instance, ``AttrKinds.h`` includes this
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file to generate the list of ``attr::Kind`` enumeration values. This list is
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separated out into multiple categories: attributes, inheritable attributes, and
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inheritable parameter attributes. This categorization happens automatically
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based on information in ``Attr.td`` and is used to implement the ``classof``
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functionality required for ``dyn_cast`` and similar APIs.
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ClangAttrPCHRead
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----------------
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**Purpose**: Creates AttrPCHRead.inc, which is used to deserialize attributes
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in the ``ASTReader::ReadAttributes`` function.
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ClangAttrPCHWrite
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-----------------
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**Purpose**: Creates AttrPCHWrite.inc, which is used to serialize attributes in
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the ``ASTWriter::WriteAttributes`` function.
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ClangAttrSpellings
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---------------------
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**Purpose**: Creates AttrSpellings.inc, which is used to implement the
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``__has_attribute`` feature test macro.
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ClangAttrSpellingListIndex
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--------------------------
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**Purpose**: Creates AttrSpellingListIndex.inc, which is used to map parsed
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attribute spellings (including which syntax or scope was used) to an attribute
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spelling list index. These spelling list index values are internal
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implementation details exposed via
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``AttributeList::getAttributeSpellingListIndex``.
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ClangAttrVisitor
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-------------------
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**Purpose**: Creates AttrVisitor.inc, which is used when implementing
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recursive AST visitors.
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ClangAttrTemplateInstantiate
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----------------------------
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**Purpose**: Creates AttrTemplateInstantiate.inc, which implements the
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``instantiateTemplateAttribute`` function, used when instantiating a template
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that requires an attribute to be cloned.
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ClangAttrParsedAttrList
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-----------------------
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**Purpose**: Creates AttrParsedAttrList.inc, which is used to generate the
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``AttributeList::Kind`` parsed attribute enumeration.
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ClangAttrParsedAttrImpl
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-----------------------
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**Purpose**: Creates AttrParsedAttrImpl.inc, which is used by
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``AttributeList.cpp`` to implement several functions on the ``AttributeList``
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class. This functionality is implemented via the ``AttrInfoMap ParsedAttrInfo``
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array, which contains one element per parsed attribute object.
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ClangAttrParsedAttrKinds
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------------------------
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**Purpose**: Creates AttrParsedAttrKinds.inc, which is used to implement the
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``AttributeList::getKind`` function, mapping a string (and syntax) to a parsed
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attribute ``AttributeList::Kind`` enumeration.
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ClangAttrDump
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-------------
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**Purpose**: Creates AttrDump.inc, which dumps information about an attribute.
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It is used to implement ``ASTDumper::dumpAttr``.
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ClangDiagsDefs
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--------------
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Generate Clang diagnostics definitions.
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ClangDiagGroups
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---------------
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Generate Clang diagnostic groups.
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ClangDiagsIndexName
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-------------------
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Generate Clang diagnostic name index.
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ClangCommentNodes
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-----------------
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Generate Clang AST comment nodes.
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ClangDeclNodes
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--------------
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Generate Clang AST declaration nodes.
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ClangStmtNodes
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--------------
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Generate Clang AST statement nodes.
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ClangSACheckers
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---------------
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Generate Clang Static Analyzer checkers.
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ClangCommentHTMLTags
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--------------------
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Generate efficient matchers for HTML tag names that are used in documentation comments.
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ClangCommentHTMLTagsProperties
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------------------------------
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Generate efficient matchers for HTML tag properties.
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ClangCommentHTMLNamedCharacterReferences
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----------------------------------------
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Generate function to translate named character references to UTF-8 sequences.
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ClangCommentCommandInfo
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-----------------------
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Generate command properties for commands that are used in documentation comments.
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ClangCommentCommandList
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-----------------------
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Generate list of commands that are used in documentation comments.
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ArmNeon
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-------
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Generate arm_neon.h for clang.
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ArmNeonSema
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-----------
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Generate ARM NEON sema support for clang.
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ArmNeonTest
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-----------
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Generate ARM NEON tests for clang.
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AttrDocs
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--------
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**Purpose**: Creates ``AttributeReference.rst`` from ``AttrDocs.td``, and is
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used for documenting user-facing attributes.
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How to write a back-end
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=======================
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TODO.
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Until we get a step-by-step HowTo for writing TableGen backends, you can at
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least grab the boilerplate (build system, new files, etc.) from Clang's
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r173931.
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TODO: How they work, how to write one. This section should not contain details
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about any particular backend, except maybe ``-print-enums`` as an example. This
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should highlight the APIs in ``TableGen/Record.h``.
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