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ed541fe200
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250407 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
1.8 KiB
LLVM
42 lines
1.8 KiB
LLVM
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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@kkkk = global i32 67, align 4
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@llll = global i32 33, align 4
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@mmmm = global i32 44, align 4
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@nnnn = global i32 55, align 4
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@oooo = global i32 32, align 4
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@pppp = global i32 41, align 4
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@qqqq = global i32 59, align 4
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@rrrr = global i32 60, align 4
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@.str = private unnamed_addr constant [32 x i8] c"%i %i %i %i %i %i %i %i %i %i \0A\00", align 1
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define i32 @main() nounwind {
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entry:
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%0 = load i32, i32* @kkkk, align 4
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%1 = load i32, i32* @llll, align 4
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%add = add nsw i32 %0, 10
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%add1 = add nsw i32 %1, 10
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%2 = load i32, i32* @mmmm, align 4
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%sub = add nsw i32 %2, -3
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%3 = load i32, i32* @nnnn, align 4
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%add2 = add nsw i32 %3, 10
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%4 = load i32, i32* @oooo, align 4
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%add3 = add nsw i32 %4, 4
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%5 = load i32, i32* @pppp, align 4
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%sub4 = add nsw i32 %5, -5
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%6 = load i32, i32* @qqqq, align 4
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%sub5 = add nsw i32 %6, -10
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%7 = load i32, i32* @rrrr, align 4
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%add6 = add nsw i32 %7, 6
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%call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i32 0, i32 0), i32 %sub5, i32 %add6, i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) nounwind
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%call7 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i32 0, i32 0), i32 %0, i32 %1, i32 %add, i32 %add1, i32 %sub, i32 %add2, i32 %add3, i32 %sub4, i32 %sub5, i32 %add6) nounwind
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ret i32 0
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}
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; 16: sw ${{[0-9]+}}, {{[0-9]+}} ( $sp ); # 4-byte Folded Spill
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; 16: lw ${{[0-9]+}}, {{[0-9]+}} ( $sp ); # 4-byte Folded Reload
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; 16: sw ${{[0-9]+}}, {{[0-9]+}} ( $sp ); # 4-byte Folded Spill
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; 16: lw ${{[0-9]+}}, {{[0-9]+}} ( $sp ); # 4-byte Folded Reload
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declare i32 @printf(i8* nocapture, ...) nounwind
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