llvm/test/CodeGen/X86/cvtv2f32.ll
Tom Stellard d40758b24e DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes
DAGCombiner::reduceBuildVecConvertToConvertBuildVec() was making two
mistakes:

1. It was checking the legality of scalar INT_TO_FP nodes and then generating
vector nodes.

2. It was passing the result value type to
TargetLoweringInfo::getOperationAction() when it should have been
passing the value type of the first operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171420 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02 22:13:01 +00:00

30 lines
735 B
LLVM

; A bug fix in the DAGCombiner made this test fail, so marking as xfail
; until this can be investigated further.
; XFAIL: *
; RUN: llc < %s -mtriple=i686-linux-pc -mcpu=corei7 | FileCheck %s
define <2 x float> @foo(i32 %x, i32 %y, <2 x float> %v) {
%t1 = uitofp i32 %x to float
%t2 = insertelement <2 x float> undef, float %t1, i32 0
%t3 = uitofp i32 %y to float
%t4 = insertelement <2 x float> %t2, float %t3, i32 1
%t5 = fmul <2 x float> %v, %t4
ret <2 x float> %t5
; CHECK: foo
; CHECK: or
; CHECK: subpd
; CHECK: cvtpd2ps
; CHECK: ret
}
define <2 x float> @bar(<2 x i32> %in) {
%r = uitofp <2 x i32> %in to <2 x float>
ret <2 x float> %r
; CHECK: bar
; CHECK: or
; CHECK: subpd
; CHECK: cvtpd2ps
; CHECK: ret
}