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6824f127f9
System z branches have a mask to select which of the 4 CC values should cause the branch to be taken. We can invert a branch by inverting the mask. However, not all instructions can produce all 4 CC values, so inverting the branch like this can lead to some oddities. For example, integer comparisons only produce a CC of 0 (equal), 1 (less) or 2 (greater). If an integer EQ is reversed to NE before instruction selection, the branch will test for 1 or 2. If instead the branch is reversed after instruction selection (by inverting the mask), it will test for 1, 2 or 3. Both are correct, but the second isn't really canonical. This patch therefore keeps track of which CC values are possible and uses this when inverting a mask. Although this is mostly cosmestic, it fixes undefined behavior for the CIJNLH in branch-08.ll. Another fix would have been to mask out bit 0 when generating the fused compare and branch, but the point of this patch is that we shouldn't need to do that in the first place. The patch also makes it easier to reuse CC results from other instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187495 91177308-0d34-0410-b5e6-96231b3b80d8
94 lines
2.3 KiB
LLVM
94 lines
2.3 KiB
LLVM
; Test 32-bit atomic NANDs.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; Check NANDs of a variable.
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define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
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; CHECK-LABEL: f1:
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; CHECK: l %r2, 0(%r3)
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; CHECK: [[LABEL:\.[^ ]*]]:
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; CHECK: lr %r0, %r2
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; CHECK: nr %r0, %r4
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; CHECK: xilf %r0, 4294967295
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; CHECK: cs %r2, %r0, 0(%r3)
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; CHECK: jl [[LABEL]]
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; CHECK: br %r14
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%res = atomicrmw nand i32 *%src, i32 %b seq_cst
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ret i32 %res
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}
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; Check NANDs of 1.
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define i32 @f2(i32 %dummy, i32 *%src) {
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; CHECK-LABEL: f2:
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; CHECK: l %r2, 0(%r3)
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; CHECK: [[LABEL:\.[^ ]*]]:
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; CHECK: lr %r0, %r2
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; CHECK: nilf %r0, 1
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; CHECK: xilf %r0, 4294967295
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; CHECK: cs %r2, %r0, 0(%r3)
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; CHECK: jl [[LABEL]]
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; CHECK: br %r14
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%res = atomicrmw nand i32 *%src, i32 1 seq_cst
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ret i32 %res
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}
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; Check NANDs of the low end of the NILH range.
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define i32 @f3(i32 %dummy, i32 *%src) {
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; CHECK-LABEL: f3:
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; CHECK: nilh %r0, 0
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; CHECK: xilf %r0, 4294967295
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; CHECK: br %r14
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%res = atomicrmw nand i32 *%src, i32 65535 seq_cst
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ret i32 %res
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}
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; Check the next value up, which must use NILF.
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define i32 @f4(i32 %dummy, i32 *%src) {
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; CHECK-LABEL: f4:
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; CHECK: nilf %r0, 65536
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; CHECK: xilf %r0, 4294967295
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; CHECK: br %r14
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%res = atomicrmw nand i32 *%src, i32 65536 seq_cst
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ret i32 %res
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}
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; Check the largest useful NILL value.
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define i32 @f5(i32 %dummy, i32 *%src) {
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; CHECK-LABEL: f5:
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; CHECK: nill %r0, 65534
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; CHECK: xilf %r0, 4294967295
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; CHECK: br %r14
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%res = atomicrmw nand i32 *%src, i32 -2 seq_cst
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ret i32 %res
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}
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; Check the low end of the NILL range.
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define i32 @f6(i32 %dummy, i32 *%src) {
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; CHECK-LABEL: f6:
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; CHECK: nill %r0, 0
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; CHECK: xilf %r0, 4294967295
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; CHECK: br %r14
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%res = atomicrmw nand i32 *%src, i32 -65536 seq_cst
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ret i32 %res
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}
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; Check the largest useful NILH value, which is one less than the above.
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define i32 @f7(i32 %dummy, i32 *%src) {
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; CHECK-LABEL: f7:
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; CHECK: nilh %r0, 65534
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; CHECK: xilf %r0, 4294967295
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; CHECK: br %r14
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%res = atomicrmw nand i32 *%src, i32 -65537 seq_cst
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ret i32 %res
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}
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; Check the highest useful NILF value, which is one less than the above.
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define i32 @f8(i32 %dummy, i32 *%src) {
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; CHECK-LABEL: f8:
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; CHECK: nilf %r0, 4294901758
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; CHECK: xilf %r0, 4294967295
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; CHECK: br %r14
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%res = atomicrmw nand i32 *%src, i32 -65538 seq_cst
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ret i32 %res
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}
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