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0dd30f878b
This pass uses a new target hook to decide whether or not to expand a particular intrinsic to the shuffevector sequence. Differential Revision: https://reviews.llvm.org/D32245 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302631 91177308-0d34-0410-b5e6-96231b3b80d8
168 lines
5.8 KiB
C++
168 lines
5.8 KiB
C++
//===--- ExpandReductions.cpp - Expand experimental reduction intrinsics --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass implements IR expansion for reduction intrinsics, allowing targets
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// to enable the experimental intrinsics until just before codegen.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/ExpandReductions.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/InstIterator.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Transforms/Utils/LoopUtils.h"
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#include "llvm/Pass.h"
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using namespace llvm;
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namespace {
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unsigned getOpcode(Intrinsic::ID ID) {
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switch (ID) {
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case Intrinsic::experimental_vector_reduce_fadd:
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return Instruction::FAdd;
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case Intrinsic::experimental_vector_reduce_fmul:
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return Instruction::FMul;
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case Intrinsic::experimental_vector_reduce_add:
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return Instruction::Add;
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case Intrinsic::experimental_vector_reduce_mul:
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return Instruction::Mul;
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case Intrinsic::experimental_vector_reduce_and:
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return Instruction::And;
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case Intrinsic::experimental_vector_reduce_or:
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return Instruction::Or;
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case Intrinsic::experimental_vector_reduce_xor:
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return Instruction::Xor;
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case Intrinsic::experimental_vector_reduce_smax:
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case Intrinsic::experimental_vector_reduce_smin:
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case Intrinsic::experimental_vector_reduce_umax:
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case Intrinsic::experimental_vector_reduce_umin:
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return Instruction::ICmp;
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case Intrinsic::experimental_vector_reduce_fmax:
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case Intrinsic::experimental_vector_reduce_fmin:
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return Instruction::FCmp;
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default:
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llvm_unreachable("Unexpected ID");
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}
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}
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RecurrenceDescriptor::MinMaxRecurrenceKind getMRK(Intrinsic::ID ID) {
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switch (ID) {
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case Intrinsic::experimental_vector_reduce_smax:
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return RecurrenceDescriptor::MRK_SIntMax;
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case Intrinsic::experimental_vector_reduce_smin:
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return RecurrenceDescriptor::MRK_SIntMin;
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case Intrinsic::experimental_vector_reduce_umax:
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return RecurrenceDescriptor::MRK_UIntMax;
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case Intrinsic::experimental_vector_reduce_umin:
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return RecurrenceDescriptor::MRK_UIntMin;
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case Intrinsic::experimental_vector_reduce_fmax:
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return RecurrenceDescriptor::MRK_FloatMax;
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case Intrinsic::experimental_vector_reduce_fmin:
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return RecurrenceDescriptor::MRK_FloatMin;
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default:
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return RecurrenceDescriptor::MRK_Invalid;
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}
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}
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bool expandReductions(Function &F, const TargetTransformInfo *TTI) {
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bool Changed = false;
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SmallVector<IntrinsicInst*, 4> Worklist;
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for (inst_iterator I = inst_begin(F), E = inst_end(F); I != E; ++I)
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if (auto II = dyn_cast<IntrinsicInst>(&*I))
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Worklist.push_back(II);
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for (auto *II : Worklist) {
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IRBuilder<> Builder(II);
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Value *Vec = nullptr;
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auto ID = II->getIntrinsicID();
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auto MRK = RecurrenceDescriptor::MRK_Invalid;
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switch (ID) {
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case Intrinsic::experimental_vector_reduce_fadd:
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case Intrinsic::experimental_vector_reduce_fmul:
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// FMFs must be attached to the call, otherwise it's an ordered reduction
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// and it can't be handled by generating this shuffle sequence.
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// TODO: Implement scalarization of ordered reductions here for targets
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// without native support.
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if (!II->getFastMathFlags().unsafeAlgebra())
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continue;
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Vec = II->getArgOperand(1);
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break;
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case Intrinsic::experimental_vector_reduce_add:
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case Intrinsic::experimental_vector_reduce_mul:
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case Intrinsic::experimental_vector_reduce_and:
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case Intrinsic::experimental_vector_reduce_or:
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case Intrinsic::experimental_vector_reduce_xor:
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case Intrinsic::experimental_vector_reduce_smax:
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case Intrinsic::experimental_vector_reduce_smin:
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case Intrinsic::experimental_vector_reduce_umax:
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case Intrinsic::experimental_vector_reduce_umin:
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case Intrinsic::experimental_vector_reduce_fmax:
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case Intrinsic::experimental_vector_reduce_fmin:
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Vec = II->getArgOperand(0);
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MRK = getMRK(ID);
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break;
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default:
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continue;
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}
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if (!TTI->shouldExpandReduction(II))
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continue;
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auto Rdx = getShuffleReduction(Builder, Vec, getOpcode(ID), MRK);
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II->replaceAllUsesWith(Rdx);
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II->eraseFromParent();
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Changed = true;
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}
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return Changed;
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}
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class ExpandReductions : public FunctionPass {
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public:
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static char ID;
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ExpandReductions() : FunctionPass(ID) {
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initializeExpandReductionsPass(*PassRegistry::getPassRegistry());
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}
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bool runOnFunction(Function &F) override {
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const auto *TTI =&getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
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return expandReductions(F, TTI);
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.addRequired<TargetTransformInfoWrapperPass>();
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AU.setPreservesCFG();
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}
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};
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}
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char ExpandReductions::ID;
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INITIALIZE_PASS_BEGIN(ExpandReductions, "expand-reductions",
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"Expand reduction intrinsics", false, false)
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INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)
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INITIALIZE_PASS_END(ExpandReductions, "expand-reductions",
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"Expand reduction intrinsics", false, false)
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FunctionPass *llvm::createExpandReductionsPass() {
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return new ExpandReductions();
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}
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PreservedAnalyses ExpandReductionsPass::run(Function &F,
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FunctionAnalysisManager &AM) {
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const auto &TTI = AM.getResult<TargetIRAnalysis>(F);
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if (!expandReductions(F, &TTI))
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return PreservedAnalyses::all();
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PreservedAnalyses PA;
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PA.preserveSet<CFGAnalyses>();
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return PA;
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}
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