Saleem Abdulrasool 4ccc33a9ab Revert "CodeGen: ensure that libcalls are always AAPCS CC" ...

This reverts SVN r280683.  Revert until I figure out why this is breaking lli
tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280778 91177308-0d34-0410-b5e6-96231b3b80d8

2016-09-07 03:17:19 +00:00

..

AArch64

GlobalISel: add a G_PHI instruction to give phis a type.

2016-09-01 20:45:41 +00:00

AMDGPU

[AMDGPU] Wave and register controls

2016-09-06 20:29:10 +00:00

ARM

Revert "CodeGen: ensure that libcalls are always AAPCS CC"

2016-09-07 03:17:19 +00:00

BPF

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Generic

CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses

2016-08-24 01:52:46 +00:00

Hexagon

[RDF] Ignore undef use operands

2016-09-06 17:03:13 +00:00

Inputs

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Lanai

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Mips

[mips] Tighten FastISel restrictions

2016-09-06 12:36:24 +00:00

MIR

GlobalISel: forbid physical registers on generic MIs.

2016-08-30 18:52:46 +00:00

MSP430

Revert r279242 - it's failing the tests

2016-08-19 14:18:34 +00:00

NVPTX

[NVPTX] Switch nvptx-use-infer-addrspace to true.

2016-08-19 20:46:45 +00:00

PowerPC

[DAGCombine] More fixups to SETCC legality checking (visitANDLike/visitORLike)

2016-09-06 23:02:23 +00:00

SPARC

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SystemZ

[SystemZ] Use valid base/index regs for inline asm

2016-08-18 21:44:15 +00:00

Thumb

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

Thumb2

Revert "CodeGen: ensure that libcalls are always AAPCS CC"

2016-09-07 03:17:19 +00:00

WebAssembly

[WebAssembly] Add asm.js-style setjmp/longjmp handling for wasm (reland r280302)

2016-09-01 21:05:15 +00:00

WinEH

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X86

[SelectionDAG] Simplify extract_subvector( insert_subvector ( Vec, In, Idx ), Idx ) -> In

2016-09-06 16:42:05 +00:00

XCore

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