llvm/test
Akira Hatanaka 01c014ca98 Revert "[AArch64] Improve code generation for logical instructions taking"
This reverts r300913.

This broke bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300916 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-20 23:03:30 +00:00
..
Analysis [SCEV] Make SCEV or modeling more aggressive. 2017-04-19 20:19:58 +00:00
Assembler Allow DataLayout to specify addrspace for allocas. 2017-04-10 22:27:50 +00:00
Bindings
Bitcode PR32382: Fix emitting complex DWARF expressions. 2017-04-18 01:21:53 +00:00
BugPoint llvm/test/BugPoint/compile-custom.ll: Use %/s for its path not to be mis-escaped. 2017-04-13 11:40:32 +00:00
CodeGen Revert "[AArch64] Improve code generation for logical instructions taking" 2017-04-20 23:03:30 +00:00
DebugInfo Don't emit locations that need a DW_OP_stack_value in DWARF 2 & 3. 2017-04-20 20:42:33 +00:00
Examples
ExecutionEngine
Feature [GVNHoist] Re-enable GVNHoist by default 2017-04-11 14:36:30 +00:00
FileCheck [FileCheck] Added --enable-var-scope option to enable scope for regex variables. 2017-03-09 17:59:04 +00:00
Instrumentation [sanitizer-coverage] remove some more stale code 2017-04-19 22:42:11 +00:00
Integer
JitListener
LibDriver
Linker [Linker] Provide callback for internalization 2017-03-13 18:08:11 +00:00
LTO Object, LTO: Add target triple to irsymtab and LTO API. 2017-04-14 02:55:06 +00:00
MC [ARM] Fix handling of mapping symbols when changing sections 2017-04-20 10:18:13 +00:00
Object [llvm-ar] errors go on stderr and not on stdout. 2017-04-05 14:52:17 +00:00
ObjectYAML [Test commit] Cleanup some whitespace in a test file 2017-04-14 18:43:57 +00:00
Other Remove readnone from invariant.group.barrier 2017-04-12 20:45:12 +00:00
SymbolRewriter
TableGen [MVT][SVE] Scalable vector MVTs (2/3) 2017-04-20 13:36:58 +00:00
ThinLTO/X86 Bitcode: Add a string table to the bitcode format. 2017-04-17 17:51:36 +00:00
tools Using address range map to speedup finding inline stack for address. 2017-04-19 20:09:38 +00:00
Transforms [Simplify] Add testcase to show that merging conditional stores for triangles is sensitive to the order of the branch targets on the conditional branches. NFC 2017-04-20 22:57:36 +00:00
Unit
Verifier Verifier: Check some amdgpu calling convention restrictions 2017-04-04 18:43:11 +00:00
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
TestRunner.sh