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Petar Jovanovic 51d7cb91e6 [mips][msa] Mask vectors holding shift amounts
Masked vectors which hold shift amounts when creating the following nodes:
ISD::SHL, ISD::SRL or ISD::SRA.
Instructions that use said nodes, which have had their arguments altered are
sll, srl, sra, bneg, bclr and bset.

For said instructions, the shift amount or the bit position that is
specified in the corresponding vector elements will be interpreted as the
shift amount/bit position modulo the size of the element in bits.

The problem lies in compiling with -O2 enabled, where the instructions for
formats .w and .d are not generated, but are instead optimized away.
In this case, having shift amounts that are either negative or greater than
the element bit size results in generation of incorrect results when
constant folding.

We remedy this by masking the operands for the nodes mentioned above before
actually creating them, so that the final result is correct before placed
into the constant pool.

Patch by Stefan Maksimovic.

Differential Revision: https://reviews.llvm.org/D31331



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300839 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-20 13:26:46 +00:00
bindings Introducing LLVMMetadataRef 2017-04-17 11:52:54 +00:00
cmake Add a linker script to version LLVM symbols 2017-04-17 20:51:50 +00:00
docs Statepoint Docs: fix incorrect uses of it's 2017-04-19 23:55:03 +00:00
examples
include [MVT][SVE] Scalable vector MVTs (1/3) 2017-04-20 13:08:17 +00:00
lib [mips][msa] Mask vectors holding shift amounts 2017-04-20 13:26:46 +00:00
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runtimes [CMake][runtimes] Use -nodefaultlibs for the runtimes build 2017-04-13 21:29:03 +00:00
test [mips][msa] Mask vectors holding shift amounts 2017-04-20 13:26:46 +00:00
tools [XRay][tools] Add option to llvm-xray extract to symbolize functions 2017-04-18 23:23:54 +00:00
unittests [ARM] Rename HW div feature to HW div Thumb. NFCI. 2017-04-20 09:38:25 +00:00
utils [tblgen] GCC/MS builtin to target intrisics map. 2017-04-19 19:14:20 +00:00
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