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53fd400cdf
and generate actual machine instruction sequences directly. Also a couple of bug fixes in code for putting constants into registers: -- Do *not* sign-extend unsigned constant that is shorter than int reg size -- Fix handling of address constant (a GlobalValue) vs. constant that must be loaded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2856 91177308-0d34-0410-b5e6-96231b3b80d8