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RPCSX/llvm

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History

Javed Absar 51f285437d [ARM] Add machine scheduler for Cortex-R52

This patch adds the Sched Machine Model for Cortex-R52.

Details of the pipeline and descriptions are in comments
in file ARMScheduleR52.td included in this patch.

Reviewers: rengolin, jmolloy

Differential Revision: https://reviews.llvm.org/D26500



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286949 91177308-0d34-0410-b5e6-96231b3b80d8

2016-11-15 11:34:54 +00:00

..

[AArch64] Compute the Newton series for reciprocals natively

2016-11-14 23:29:01 +00:00

AMDGPU: Fix f16 fabs/fneg

2016-11-15 02:25:28 +00:00

[ARM] Add machine scheduler for Cortex-R52

2016-11-15 11:34:54 +00:00

[AVR] Add a selection of CodeGen tests

2016-11-09 23:46:52 +00:00

…

Add -O0 support for @llvm.invariant.group.barrier by discarding it if it gets to ISel.

2016-11-07 16:47:20 +00:00

[Hexagon] Remove unsafe load instructions that affect Stack Slot Coloring

2016-11-14 17:11:00 +00:00

…

…

[mips] Renable small data section test.

2016-11-08 13:03:45 +00:00

MIRParser: Add support for parsing vreg reg alloc hints

2016-11-15 00:03:14 +00:00

Fix PR27500: on MSP430 the branch destination offset is measured in words, not bytes.

2016-11-08 17:19:59 +00:00

[NVPTX] Remove NVPTXFavorNonGenericAddrSpaces pass.

2016-10-31 21:51:42 +00:00

[PPC] Add intrinsic mapping to the xscvhpsp instruction

2016-11-14 18:43:59 +00:00

ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps()

2016-11-11 01:34:21 +00:00

[SystemZ] Support CL(G)T instructions

2016-11-11 12:48:26 +00:00

Revert "[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently"

2016-11-03 14:08:01 +00:00

Revert "[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently"

2016-11-03 14:08:01 +00:00

[WebAssembly] Convert stackified IMPLICIT_DEF into constant 0.

2016-11-08 19:40:38 +00:00

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DAGCombiner: fix combine of trunc and select

2016-11-15 07:55:22 +00:00

…