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llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
Diana Picus 8ae39dc847 [ARM] GlobalISel: Add reg mapping for s64 G_FCMP 
Map the result into GPR and the operands into FPR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307653 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-11 11:47:45 +00:00

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# RUN: llc -mtriple arm-- -global-isel -run-pass=regbankselect %s -o - | FileCheck %s
--- |
define void @test_add_s32() { ret void }
define void @test_add_s16() { ret void }
define void @test_add_s8() { ret void }
define void @test_add_s1() { ret void }
define void @test_sub_s32() { ret void }
define void @test_sub_s16() { ret void }
define void @test_sub_s8() { ret void }
define void @test_mul_s32() { ret void }
define void @test_mul_s16() { ret void }
define void @test_mul_s8() { ret void }
define void @test_sdiv_s32() #1 { ret void }
define void @test_udiv_s32() #1 { ret void }
define void @test_and_s32() { ret void}
define void @test_or_s32() { ret void}
define void @test_xor_s32() { ret void}
define void @test_loads() #0 { ret void }
define void @test_stores() #0 { ret void }
define void @test_stack() { ret void }
define void @test_gep() { ret void }
define void @test_constants() { ret void }
define void @test_anyext_s8_32() { ret void }
define void @test_anyext_s16_32() { ret void }
define void @test_trunc_s32_16() { ret void }
define void @test_icmp_eq_s32() { ret void }
define void @test_fcmp_one_s32() #0 { ret void }
define void @test_fcmp_ugt_s64() #0 { ret void }
define void @test_select_s32() { ret void }
define void @test_fadd_s32() #0 { ret void }
define void @test_fadd_s64() #0 { ret void }
define void @test_soft_fp_s64() #0 { ret void }
attributes #0 = { "target-features"="+vfp2"}
attributes #1 = { "target-features"="+hwdiv-arm" }
...
---
name: test_add_s32
# CHECK-LABEL: name: test_add_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s32) = COPY %r0
%1(s32) = COPY %r1
%2(s32) = G_ADD %0, %1
%r0 = COPY %2(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_add_s16
# CHECK-LABEL: name: test_add_s16
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
# CHECK: - { id: 3, class: gprb, preferred-register: '' }
# CHECK: - { id: 4, class: gprb, preferred-register: '' }
# CHECK: - { id: 5, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s16) = COPY %r0
%1(s16) = COPY %r1
%2(s32) = G_ANYEXT %0(s16)
%3(s32) = G_ANYEXT %1(s16)
%4(s32) = G_ADD %2, %3
%5(s16) = G_TRUNC %4(s32)
%r0 = COPY %5(s16)
BX_RET 14, _, implicit %r0
...
---
name: test_add_s8
# CHECK-LABEL: name: test_add_s8
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
# CHECK: - { id: 3, class: gprb, preferred-register: '' }
# CHECK: - { id: 4, class: gprb, preferred-register: '' }
# CHECK: - { id: 5, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s8) = COPY %r0
%1(s8) = COPY %r1
%2(s32) = G_ANYEXT %0(s8)
%3(s32) = G_ANYEXT %1(s8)
%4(s32) = G_ADD %2, %3
%5(s8) = G_TRUNC %4(s32)
%r0 = COPY %5(s8)
BX_RET 14, _, implicit %r0
...
---
name: test_add_s1
# CHECK-LABEL: name: test_add_s1
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
# CHECK: - { id: 3, class: gprb, preferred-register: '' }
# CHECK: - { id: 4, class: gprb, preferred-register: '' }
# CHECK: - { id: 5, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s1) = COPY %r0
%1(s1) = COPY %r1
%2(s32) = G_ANYEXT %0(s1)
%3(s32) = G_ANYEXT %1(s1)
%4(s32) = G_ADD %2, %3
%5(s1) = G_TRUNC %4(s32)
%r0 = COPY %5(s1)
BX_RET 14, _, implicit %r0
...
---
name: test_sub_s32
# CHECK-LABEL: name: test_sub_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s32) = COPY %r0
%1(s32) = COPY %r1
%2(s32) = G_SUB %0, %1
%r0 = COPY %2(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_sub_s16
# CHECK-LABEL: name: test_sub_s16
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
# CHECK: - { id: 3, class: gprb, preferred-register: '' }
# CHECK: - { id: 4, class: gprb, preferred-register: '' }
# CHECK: - { id: 5, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s16) = COPY %r0
%1(s16) = COPY %r1
%2(s32) = G_ANYEXT %0(s16)
%3(s32) = G_ANYEXT %1(s16)
%4(s32) = G_SUB %2, %3
%5(s16) = G_TRUNC %4(s32)
%r0 = COPY %5(s16)
BX_RET 14, _, implicit %r0
...
---
name: test_sub_s8
# CHECK-LABEL: name: test_sub_s8
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
# CHECK: - { id: 3, class: gprb, preferred-register: '' }
# CHECK: - { id: 4, class: gprb, preferred-register: '' }
# CHECK: - { id: 5, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s8) = COPY %r0
%1(s8) = COPY %r1
%2(s32) = G_ANYEXT %0(s8)
%3(s32) = G_ANYEXT %1(s8)
%4(s32) = G_SUB %2, %3
%5(s8) = G_TRUNC %4(s32)
%r0 = COPY %5(s8)
BX_RET 14, _, implicit %r0
...
---
name: test_mul_s32
# CHECK-LABEL: name: test_mul_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s32) = COPY %r0
%1(s32) = COPY %r1
%2(s32) = G_MUL %0, %1
%r0 = COPY %2(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_mul_s16
# CHECK-LABEL: name: test_mul_s16
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
# CHECK: - { id: 3, class: gprb, preferred-register: '' }
# CHECK: - { id: 4, class: gprb, preferred-register: '' }
# CHECK: - { id: 5, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s16) = COPY %r0
%1(s16) = COPY %r1
%2(s32) = G_ANYEXT %0(s16)
%3(s32) = G_ANYEXT %1(s16)
%4(s32) = G_MUL %2, %3
%5(s16) = G_TRUNC %4(s32)
%r0 = COPY %5(s16)
BX_RET 14, _, implicit %r0
...
---
name: test_mul_s8
# CHECK-LABEL: name: test_mul_s8
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
# CHECK: - { id: 3, class: gprb, preferred-register: '' }
# CHECK: - { id: 4, class: gprb, preferred-register: '' }
# CHECK: - { id: 5, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s8) = COPY %r0
%1(s8) = COPY %r1
%2(s32) = G_ANYEXT %0(s8)
%3(s32) = G_ANYEXT %1(s8)
%4(s32) = G_MUL %2, %3
%5(s8) = G_TRUNC %4(s32)
%r0 = COPY %5(s8)
BX_RET 14, _, implicit %r0
...
---
name: test_sdiv_s32
# CHECK-LABEL: name: test_sdiv_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s32) = COPY %r0
%1(s32) = COPY %r1
%2(s32) = G_SDIV %0, %1
%r0 = COPY %2(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_udiv_s32
# CHECK-LABEL: name: test_udiv_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s32) = COPY %r0
%1(s32) = COPY %r1
%2(s32) = G_UDIV %0, %1
%r0 = COPY %2(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_and_s32
# CHECK-LABEL: name: test_and_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s32) = COPY %r0
%1(s32) = COPY %r1
%2(s32) = G_AND %0, %1
%r0 = COPY %2(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_or_s32
# CHECK-LABEL: name: test_or_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s32) = COPY %r0
%1(s32) = COPY %r1
%2(s32) = G_OR %0, %1
%r0 = COPY %2(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_xor_s32
# CHECK-LABEL: name: test_xor_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s32) = COPY %r0
%1(s32) = COPY %r1
%2(s32) = G_XOR %0, %1
%r0 = COPY %2(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_loads
# CHECK-LABEL: name: test_loads
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
# CHECK: - { id: 3, class: gprb, preferred-register: '' }
# CHECK: - { id: 4, class: gprb, preferred-register: '' }
# CHECK: - { id: 5, class: gprb, preferred-register: '' }
# CHECK: - { id: 6, class: fprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
body: |
bb.0:
liveins: %r0
%0(p0) = COPY %r0
%6(s64) = G_LOAD %0 :: (load 8)
%1(s32) = G_LOAD %0 :: (load 4)
%2(s16) = G_LOAD %0 :: (load 2)
%3(s8) = G_LOAD %0 :: (load 1)
%4(s1) = G_LOAD %0 :: (load 1)
%5(p0) = G_LOAD %0 :: (load 4)
BX_RET 14, _, implicit %r0
...
---
name: test_stores
# CHECK-LABEL: name: test_stores
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
# CHECK: - { id: 3, class: gprb, preferred-register: '' }
# CHECK: - { id: 4, class: gprb, preferred-register: '' }
# CHECK: - { id: 5, class: gprb, preferred-register: '' }
# CHECK: - { id: 6, class: fprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
body: |
bb.0:
liveins: %r0, %r1, %r2, %r3, %r4, %r5, %d6
%0(p0) = COPY %r0
%1(s32) = COPY %r1
G_STORE %1(s32), %0 :: (store 4)
%2(s16) = COPY %r2
G_STORE %2(s16), %0 :: (store 2)
%3(s8) = COPY %r3
G_STORE %3(s8), %0 :: (store 1)
%4(s1) = COPY %r4
G_STORE %4(s1), %0 :: (store 1)
%5(p0) = COPY %r5
G_STORE %5(p0), %0 :: (store 4)
%6(s64) = COPY %d6
G_STORE %6(s64), %0 :: (store 8)
BX_RET 14, _, implicit %r0
...
---
name: test_stack
# CHECK-LABEL: name: test_stack
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
# CHECK: - { id: 3, class: gprb, preferred-register: '' }
# CHECK: - { id: 4, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
fixedStack:
- { id: 0, offset: 0, size: 4, alignment: 4, isImmutable: true, isAliased: false }
body: |
bb.0:
%0(p0) = G_FRAME_INDEX %fixed-stack.0
%1(s32) = G_LOAD %0(p0) :: (load 4 from %fixed-stack.0, align 0)
%2(p0) = COPY %sp
%3(s32) = G_CONSTANT i32 8
%4(p0) = G_GEP %2, %3(s32)
G_STORE %1(s32), %4(p0) :: (store 4)
BX_RET 14, _
...
---
name: test_gep
# CHECK-LABEL: name: test_gep
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(p0) = COPY %r0
%1(s32) = COPY %r1
%2(p0) = G_GEP %0, %1(s32)
%r0 = COPY %2(p0)
BX_RET 14, _, implicit %r0
...
---
name: test_constants
# CHECK-LABEL: name: test_constants
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
body: |
bb.0:
%0(s32) = G_CONSTANT 42
%r0 = COPY %0(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_anyext_s8_32
# CHECK-LABEL: name: test_anyext_s8_32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.0:
liveins: %r0
%0(s8) = COPY %r0
%1(s32) = G_ANYEXT %0(s8)
%r0 = COPY %1(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_anyext_s16_32
# CHECK-LABEL: name: test_anyext_s16_32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.0:
liveins: %r0
%0(s16) = COPY %r0
%1(s32) = G_ANYEXT %0(s16)
%r0 = COPY %1(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_trunc_s32_16
# CHECK-LABEL: name: test_trunc_s32_16
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.0:
liveins: %r0
%0(s32) = COPY %r0
%1(s16) = G_TRUNC %0(s32)
%r0 = COPY %1(s16)
BX_RET 14, _, implicit %r0
...
---
name: test_icmp_eq_s32
# CHECK-LABEL: name: test_icmp_eq_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s32) = COPY %r0
%1(s32) = COPY %r1
%2(s1) = G_ICMP intpred(eq), %0(s32), %1
%3(s32) = G_ZEXT %2(s1)
%r0 = COPY %3(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_fcmp_one_s32
# CHECK-LABEL: name: test_fcmp_one_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: fprb, preferred-register: '' }
# CHECK: - { id: 1, class: fprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
body: |
bb.0:
liveins: %s0, %s1
%0(s32) = COPY %s0
%1(s32) = COPY %s1
%2(s1) = G_FCMP floatpred(one), %0(s32), %1
%3(s32) = G_ZEXT %2(s1)
%r0 = COPY %3(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_fcmp_ugt_s64
# CHECK-LABEL: name: test_fcmp_ugt_s64
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: fprb, preferred-register: '' }
# CHECK: - { id: 1, class: fprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
body: |
bb.0:
liveins: %d0, %d1
%0(s64) = COPY %d0
%1(s64) = COPY %d1
%2(s1) = G_FCMP floatpred(ugt), %0(s64), %1
%3(s32) = G_ZEXT %2(s1)
%r0 = COPY %3(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_select_s32
# CHECK-LABEL: name: test_select_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: gprb, preferred-register: '' }
# CHECK: - { id: 3, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
body: |
bb.0:
liveins: %r0, %r1, %r2
%0(s32) = COPY %r0
%1(s32) = COPY %r1
%2(s1) = COPY %r2
%3(s32) = G_SELECT %2(s1), %0, %1
%r0 = COPY %3(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_fadd_s32
# CHECK-LABEL: name: test_fadd_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: fprb, preferred-register: '' }
# CHECK: - { id: 1, class: fprb, preferred-register: '' }
# CHECK: - { id: 2, class: fprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %s0, %s1
%0(s32) = COPY %s0
%1(s32) = COPY %s1
%2(s32) = G_FADD %0, %1
%s0 = COPY %2(s32)
BX_RET 14, _, implicit %s0
...
---
name: test_fadd_s64
# CHECK-LABEL: name: test_fadd_s64
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: fprb, preferred-register: '' }
# CHECK: - { id: 1, class: fprb, preferred-register: '' }
# CHECK: - { id: 2, class: fprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %d0, %d1
%0(s64) = COPY %d0
%1(s64) = COPY %d1
%2(s64) = G_FADD %0, %1
%d0 = COPY %2(s64)
BX_RET 14, _, implicit %d0
...
---
name: test_soft_fp_s64
# CHECK-LABEL: name: test_soft_fp_s64
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb, preferred-register: '' }
# CHECK: - { id: 1, class: gprb, preferred-register: '' }
# CHECK: - { id: 2, class: fprb, preferred-register: '' }
# CHECK: - { id: 3, class: gprb, preferred-register: '' }
# CHECK: - { id: 4, class: gprb, preferred-register: '' }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s32) = COPY %r0
%1(s32) = COPY %r1
%2(s64) = G_MERGE_VALUES %0(s32), %1(s32)
%3(s32), %4(s32) = G_UNMERGE_VALUES %2(s64)
%r0 = COPY %3(s32)
%r1 = COPY %4(s32)
BX_RET 14, _, implicit %r0, implicit %r1
...
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