llvm/test/CodeGen/ARM/neon_vshl_minint.ll
Luke Cheeseman ca2a3eb2e7 When lowering vector shifts a check is performed to see if the value to shift by
is an immediate, in this check the value is negated and stored in and int64_t.
The value can be -2^63 yet the result cannot be stored in an int64_t and this
gives some undefined behaviour causing failures. The negation is only necessary
when the values is within a certain range and so it should not need to negate
-2^63, this patch introduces this and also a regression test.

Differential Revision: http://reviews.llvm.org/D11408



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243100 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 09:31:48 +00:00

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486 B
LLVM

; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
; RUN: llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
define <1 x i64> @vshl_minint() #0 {
entry:
; CHECK-LABEL: vshl_minint
; CHECK: vldr
; CHECK: vshl.u64
%vshl.i = tail call <1 x i64> @llvm.arm.neon.vshiftu.v1i64(<1 x i64> undef, <1 x i64> <i64 -9223372036854775808>)
ret <1 x i64> %vshl.i
}
declare <1 x i64> @llvm.arm.neon.vshiftu.v1i64(<1 x i64>, <1 x i64>)