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972f5896e4
- Modifications from the last patch included (issues pointed by Evan Cheng are now fixed). - Added more MipsI instructions. - Added more patterns to match branch instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37461 91177308-0d34-0410-b5e6-96231b3b80d8
64 lines
2.4 KiB
C++
64 lines
2.4 KiB
C++
//===- Mips.td - Describe the Mips Target Machine ---------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Bruno Cardoso Lopes and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Target-independent interfaces which we are implementing
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//===----------------------------------------------------------------------===//
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include "../Target.td"
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//===----------------------------------------------------------------------===//
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// Register File Description
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//===----------------------------------------------------------------------===//
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include "MipsRegisterInfo.td"
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//===----------------------------------------------------------------------===//
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// Subtarget features
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//===----------------------------------------------------------------------===//
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// TODO: dummy, needed to compile
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def FeatureCIX : SubtargetFeature<"r3000", "isR3000", "true",
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"Enable r3000 extentions">;
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//===----------------------------------------------------------------------===//
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// Instruction Description
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//===----------------------------------------------------------------------===//
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include "MipsInstrInfo.td"
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def MipsInstrInfo : InstrInfo {
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// Define how we want to layout our target-specific information field.
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let TSFlagsFields = [];
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let TSFlagsShifts = [];
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}
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//===----------------------------------------------------------------------===//
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// Calling Conventions
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//===----------------------------------------------------------------------===//
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include "MipsCallingConv.td"
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//===----------------------------------------------------------------------===//
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// Mips processors supported.
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//===----------------------------------------------------------------------===//
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class Proc<string Name, list<SubtargetFeature> Features>
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: Processor<Name, NoItineraries, Features>;
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def : Proc<"generic", []>;
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//===----------------------------------------------------------------------===//
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// Declare the target which we are implementing
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//===----------------------------------------------------------------------===//
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def Mips : Target {
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// Pull in Instruction Info:
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let InstructionSet = MipsInstrInfo;
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}
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