Chris Lattner 623ce5d7f6 Fix build error ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1722 91177308-0d34-0410-b5e6-96231b3b80d8		2002-02-11 17:11:43 +00:00
..
InstrSched	Convert operand iterator over to work like an STL iterator	2002-02-05 06:02:59 +00:00
InstrSelection	* Switch over to cleaner TmpInstruction model	2002-02-03 07:39:06 +00:00
LiveVar	Convert BBLiveVar to be a BasicBlock annotation, this removes the BB2BBLVMap from MethodLiveVarInfo.	2002-02-05 06:52:25 +00:00
RegAlloc	Convert operand iterator over to work like an STL iterator	2002-02-05 06:02:59 +00:00
MachineCodeForInstruction.h	Code pulled out of MAchineInstr.(h|cpp)	2002-02-03 07:54:50 +00:00
Makefile	Fix build error	2002-02-11 17:11:43 +00:00
SparcV9.burg.in	Added support for bitwise logical operators. Use different labels for	2001-11-08 05:14:02 +00:00
SparcV9AsmPrinter.cpp	EmitAssembly doesn't need an UltraSparc, it can do with any TargetMachine	2002-02-04 15:53:23 +00:00
SparcV9Instr.def	Change latency of SETX to improve schedule -- just a hack.	2001-11-14 15:54:44 +00:00
SparcV9InstrInfo.cpp	* Switch to new TmpInstruction model	2002-02-03 07:49:49 +00:00
SparcV9InstrSelection.cpp	* Switch to new TmpInstruction model	2002-02-03 07:50:56 +00:00
SparcV9InstrSelectionSupport.h	Changes to build successfully with GCC 3.02	2002-01-20 22:54:45 +00:00
SparcV9Internals.h	* Minor cleanups	2002-02-04 05:59:25 +00:00
SparcV9RegClassInfo.cpp	* Code Cleanups	2002-02-05 03:52:29 +00:00
SparcV9RegClassInfo.h	* Minor cleanups	2002-02-04 05:59:25 +00:00
SparcV9RegInfo.cpp	Convert operand iterator over to work like an STL iterator	2002-02-05 06:02:59 +00:00
SparcV9SchedInfo.cpp	Pull all of the scheduling related stuff out of Sparc.cpp into it's own file	2002-02-04 00:39:14 +00:00
SparcV9TargetMachine.cpp	The interface to instruction scheduling is now just a call to get the pass.	2002-02-04 20:03:43 +00:00