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ec6175c524
This should not be treated as a different version of private_segment_buffer. These are distinct things with different uses and register classes, and requires the function argument info to have more context about the function's type and environment. Also add missing test coverage for the intrinsic, and emit an error for HSA. This also encovers that the intrinsic is broken unless there happen to be stack objects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306264 91177308-0d34-0410-b5e6-96231b3b80d8
36 lines
1.3 KiB
LLVM
36 lines
1.3 KiB
LLVM
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; FIXME: Requires stack object to not assert
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; GCN-LABEL: {{^}}test_ps:
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; GCN: s_load_dwordx2 s[4:5], s[0:1], 0x0
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; GCN: buffer_store_dword v0, off, s[4:7], s2 offset:4
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; GCN: s_load_dword s{{[0-9]+}}, s[0:1], 0x0
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; GCN-NEXT: s_waitcnt
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; GCN-NEXT: ; return
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define amdgpu_ps i32 @test_ps() #1 {
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%alloca = alloca i32
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store volatile i32 0, i32* %alloca
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%implicit_buffer_ptr = call i8 addrspace(2)* @llvm.amdgcn.implicit.buffer.ptr()
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%buffer_ptr = bitcast i8 addrspace(2)* %implicit_buffer_ptr to i32 addrspace(2)*
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%value = load volatile i32, i32 addrspace(2)* %buffer_ptr
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ret i32 %value
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}
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; GCN-LABEL: {{^}}test_cs:
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; GCN: s_mov_b64 s[4:5], s[0:1]
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; GCN: buffer_store_dword v{{[0-9]+}}, off, s[4:7], s2 offset:4
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; GCN: s_load_dword s0, s[0:1], 0x0
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define amdgpu_cs i32 @test_cs() #1 {
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%alloca = alloca i32
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store volatile i32 0, i32* %alloca
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%implicit_buffer_ptr = call i8 addrspace(2)* @llvm.amdgcn.implicit.buffer.ptr()
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%buffer_ptr = bitcast i8 addrspace(2)* %implicit_buffer_ptr to i32 addrspace(2)*
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%value = load volatile i32, i32 addrspace(2)* %buffer_ptr
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ret i32 %value
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}
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declare i8 addrspace(2)* @llvm.amdgcn.implicit.buffer.ptr() #0
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attributes #0 = { nounwind readnone speculatable }
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attributes #1 = { nounwind }
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