Simon Pilgrim 1a576c57ed [X86] Add missing BITREVERSE costs for SSE2 vectors and i8/i16/i32/i64 scalars ...

Prep work for PR31810

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297876 91177308-0d34-0410-b5e6-96231b3b80d8

2017-03-15 19:34:55 +00:00

..

alternate-shuffle-cost.ll

[CostModel][X86] Updated vXi8 and vXi16 Reverse/Alternate shuffle costs

2017-01-04 14:01:33 +00:00

arith-fp.ll

[TargetTransformInfo] getIntrinsicInstrCost() scalarization estimation improved

2017-03-14 06:35:36 +00:00

arith.ll

[CostModel][X86] Include the cost of 256-bit upper subvector extract/insertion in AVX1 v4i64 MUL

2017-01-05 18:20:25 +00:00

bitreverse.ll

[X86] Add missing BITREVERSE costs for SSE2 vectors and i8/i16/i32/i64 scalars

2017-03-15 19:34:55 +00:00

bswap.ll

[X86][SSE] Add cost model for BSWAP of vectors

2016-06-20 23:08:21 +00:00

cast.ll

[X86] Make some cast costs more precise

2016-07-11 21:39:44 +00:00

cmp.ll

[X86][SSE] Improve cost model for i64 vector comparisons on pre-SSE42 targets

2016-05-09 21:14:38 +00:00

ctbits-cost.ll

[VectorLegalizer] Expansion of CTLZ using CTPOP when possible

2016-11-08 14:10:28 +00:00

div.ll

[CostModel][X86] Fixed AVX1/AVX512 sdiv/udiv uniformconst costs for 256/512 bit integer vectors

2016-10-20 18:00:35 +00:00

fptosi.ll

[X86][AVX512] Add support for v2i64 fptosi/fptoui/sitofp/uitofp on AVX512DQ-only targets

2016-11-24 14:46:55 +00:00

fptoui.ll

[X86][AVX512] Add support for v2i64 fptosi/fptoui/sitofp/uitofp on AVX512DQ-only targets

2016-11-24 14:46:55 +00:00

gep.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

i32.ll

We are not ready to estimate the cost of integer expansions based on the number of parts. This test is too noisy.

2012-12-23 09:11:07 +00:00

insert-extract-at-zero.ll

Cost Model: Normalize the insert/extract index when splitting types

2012-11-05 21:12:13 +00:00

interleave-load-i32.ll

AVX-512 Loop Vectorizer: Cost calculation for interleave load/store patterns.

2017-01-02 10:37:52 +00:00

interleave-store-i32.ll

AVX-512 Loop Vectorizer: Cost calculation for interleave load/store patterns.

2017-01-02 10:37:52 +00:00

intrinsic-cost.ll

TTI: Honour cost model for estimating cost of vector-intrinsic and calls.

2015-03-17 19:37:28 +00:00

lit.local.cfg

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

load_store.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

loop_v2.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

masked-intrinsic-cost.ll

Support arbitrary addrspace pointers in masked load/store intrinsics

2016-06-28 18:27:25 +00:00

reduction.ll

[SLP] Fixed cost model for horizontal reduction.

2016-12-01 18:42:42 +00:00

rem.ll

[CostModel][X86] Added tests for current integer signed/unsigned remainder costs

2016-10-23 18:35:02 +00:00

scalarize.ll

[X86][SSE] Add initial costs for vector CTTZ/CTLZ

2016-08-04 10:51:41 +00:00

shuffle-broadcast.ll

[CostModel][X86] Add support for broadcast shuffle costs

2017-01-05 15:56:08 +00:00

shuffle-reverse.ll

[X86][AVX512] Use lowerShuffleAsRepeatedMaskAndLanePermute for non-VBMI v64i8 shuffles (PR31470)

2017-01-07 15:37:50 +00:00

shuffle-single-src.ll

[X86] Add costs for non-AVX512 single-source permutation integer shuffles

2017-02-02 20:27:13 +00:00

shuffle-two-src.ll

AVX-512 Loop Vectorizer: Cost calculation for interleave load/store patterns.

2017-01-02 10:37:52 +00:00

sitofp.ll

[X86][AVX512] Add support for v2i64 fptosi/fptoui/sitofp/uitofp on AVX512DQ-only targets

2016-11-24 14:46:55 +00:00

slm-arith-costs.ll

[X86] updating TTI costs for arithmetic instructions on X86\SLM arch.

2017-01-11 08:23:37 +00:00

sse-itoi.ll

[X86] Add costs for SSE zext/sext to v4i64 to TTI

2016-06-10 17:01:05 +00:00

strided-load-i8.ll

Fix line endings

2017-01-11 10:25:31 +00:00

strided-load-i16.ll

Fix line endings

2017-01-11 10:25:31 +00:00

strided-load-i32.ll

Fix line endings

2017-01-11 10:25:31 +00:00

strided-load-i64.ll

Fix line endings

2017-01-11 10:25:31 +00:00

testshiftashr.ll

[X86][SSE] Vectorize i64 ASHR operations

2015-07-29 20:31:45 +00:00

testshiftlshr.ll

[CostModel][X86] Fixed vXi8 uniform shift costs.

2017-01-08 14:14:36 +00:00

testshiftshl.ll

[CostModel][X86] Fixed vXi8 uniform shift costs.

2017-01-08 14:14:36 +00:00

tiny.ll

Cost Model: change the default cost of control flow instructions (br / ret / ...) to zero.

2012-12-05 21:21:26 +00:00

trunc.ll

[CostModel][X86] Added tests for current integer trunc costs

2016-10-23 15:17:52 +00:00

uitofp.ll

[CostModel][X86] Updated sitofp/uitofp scalar/vector cost tests

2016-11-22 18:55:49 +00:00

uniformshift.ll

[LV, X86] Be more optimistic about vectorizing shifts.

2016-08-04 22:48:03 +00:00

vdiv-cost.ll

[CostModel][X86] Fix 512-bit SDIV/UDIV 'big' costs.

2017-01-06 11:12:53 +00:00

vector_gep.ll

Fixed a failure in cost calculation for vector GEP

2015-12-01 12:08:36 +00:00

vectorized-loop.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vselect-cost.ll

[x86,sdag] Two interrelated changes to the x86 and sdag code.

2015-02-19 10:36:19 +00:00

vshift-ashr-cost.ll

[CostModel][X86] Fix AVX512BW vector shift costs for vXi16 types

2017-01-15 20:44:00 +00:00

vshift-lshr-cost.ll

[CostModel][X86] Fix AVX512BW vector shift costs for vXi16 types

2017-01-15 20:44:00 +00:00

vshift-shl-cost.ll

[CostModel][X86] Fix AVX512BW vector shift costs for vXi16 types

2017-01-15 20:44:00 +00:00