llvm/test/CodeGen/Mips/adjust-callstack-sp.ll
Daniel Sanders ed541fe200 [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
Summary:
The -mcpu=mips16 option caused the Integrated Assembler to crash because
it couldn't figure out the architecture revision number to write to the
.MIPS.abiflags section. This CPU definition has been removed because, like
microMIPS, MIPS16 is an ASE to a base architecture.

Reviewers: vkalintiris

Subscribers: rkotler, llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D13656



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250407 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 14:34:23 +00:00

21 lines
809 B
LLVM

; RUN: llc < %s -march=mips -mattr=mips16 | FileCheck %s -check-prefix=M16
; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips3 | FileCheck %s -check-prefix=GP64
; RUN: llc < %s -march=mips -mcpu=mips64 | FileCheck %s -check-prefix=GP64
; RUN: llc < %s -march=mips -mcpu=mips64r6 | FileCheck %s -check-prefix=GP64
declare void @bar(i32*)
define void @foo(i32 %sz) {
; ALL-LABEL: foo:
; M16-NOT: addiu $sp, 0 # 16 bit inst
; GP32-NOT: addiu $sp, $sp, 0
; GP64-NOT: daddiu $sp, $sp, 0
%a = alloca i32, i32 %sz
call void @bar(i32* %a)
ret void
}