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7e90f694b6
r242871 missed one place that should be guarded with isPhysicalReg. This patch fixes that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243555 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
995 B
LLVM
41 lines
995 B
LLVM
; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 -disable-cgp | FileCheck %s
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; Disable CGP which also folds branches, so that only BranchFolding is under
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; the spotlight.
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target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
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target triple = "nvptx64-nvidia-cuda"
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define void @foo(i32 %x, float* %output) {
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; CHECK-LABEL: .visible .func foo(
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; CHECK-NOT: bra.uni
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; CHECK-NOT: LBB0_
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%1 = icmp eq i32 %x, 1
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br i1 %1, label %then, label %else
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then:
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br label %merge
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else:
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br label %merge
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merge:
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store float 2.0, float* %output
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ret void
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}
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; PR24299. no crash
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define ptx_kernel void @hoge() #0 {
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; CHECK-LABEL: .visible .entry hoge(
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bb:
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br i1 undef, label %bb1, label %bb4
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bb1: ; preds = %bb1, %bb
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%tmp = phi i64 [ %tmp2, %bb1 ], [ undef, %bb ]
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%tmp2 = add nsw i64 %tmp, 1
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%tmp3 = icmp sle i64 %tmp, 0
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br i1 %tmp3, label %bb1, label %bb4
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bb4: ; preds = %bb4, %bb1, %bb
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br label %bb4
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}
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