llvm/add-of-carry.ll at 68c39552a5d4ec959da58f130ca8a6842a3b9017 - llvm - Gitea: Git with a cup of tea

RPCSX/llvm

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Owen Anderson c004eec71b When adding the carry bit to another value on X86, exploit the fact that the carry-materialization

(sbbl x, x) sets the registers to 0 or ~0.  Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.

This fixes <rdar://problem/8449754>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114460 91177308-0d34-0410-b5e6-96231b3b80d8

2010-09-21 18:41:19 +00:00

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 ; RUN: llc < %s -march=x86 | FileCheck %s
 ; <rdar://problem/8449754>
 define i32 @add32carry(i32 %sum, i32 %x) nounwind readnone ssp {
 entry:
 ; CHECK:	sbbl	%ecx, %ecx
 ; CHECK-NOT: addl
 ; CHECK: subl	%ecx, %eax
   %add4 = add i32 %x, %sum
   %cmp = icmp ult i32 %add4, %x
   %inc = zext i1 %cmp to i32
   %z.0 = add i32 %add4, %inc
   ret i32 %z.0
 }