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60cefca131
We modeled the RDFLAGS{32,64} operations as "using" {E,R}FLAGS.
While technically correct, this is not be desirable for folks who want
to examine aspects of the FLAGS register which are not related to
computation like whether or not CPUID is a valid instruction.
Differential Revision: http://reviews.llvm.org/D17782
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262465 91177308-0d34-0410-b5e6-96231b3b80d8
38 lines
890 B
LLVM
38 lines
890 B
LLVM
; RUN: llc -verify-machineinstrs < %s | FileCheck %s
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target triple = "x86_64-pc-win32"
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declare i64 @llvm.x86.flags.read.u64()
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declare void @llvm.x86.flags.write.u64(i64)
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define i64 @read_flags() {
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entry:
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%flags = call i64 @llvm.x86.flags.read.u64()
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ret i64 %flags
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}
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; CHECK-LABEL: read_flags:
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; CHECK: pushq %rbp
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; CHECK: .seh_pushreg 5
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; CHECK: movq %rsp, %rbp
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; CHECK: .seh_setframe 5, 0
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; CHECK: .seh_endprologue
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; CHECK-NEXT: pushfq
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; CHECK-NEXT: popq %rax
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; CHECK-NEXT: popq %rbp
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define void @write_flags(i64 %arg) {
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entry:
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call void @llvm.x86.flags.write.u64(i64 %arg)
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ret void
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}
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; CHECK-LABEL: write_flags:
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; CHECK: pushq %rbp
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; CHECK: .seh_pushreg 5
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; CHECK: movq %rsp, %rbp
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; CHECK: .seh_setframe 5, 0
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; CHECK: .seh_endprologue
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; CHECK-NEXT: pushq %rcx
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; CHECK-NEXT: popfq
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; CHECK-NEXT: popq %rbp
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