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96f8539f4a
Most of the PowerPC64 code generation for the ELF ABI is already PIC. There are four main exceptions: (1) Constant pointer arrays etc. should in writeable sections. (2) The TOC restoration NOP after a call is needed for all global symbols. While GNU ld has a workaround for questionable GCC self-calls, we trigger the checks for calls from COMDAT sections as they cross input sections and are therefore not considered self-calls. The current decision is questionable and suboptimal, but outside the scope of the change. (3) TLS access can not use the initial-exec model. (4) Jump tables should use relative addresses. Note that the current encoding doesn't work for the large code model, but it is more compact than the default for any non-trivial jump table. Improving this is again beyond the scope of this change. At least (1) and (3) are assumptions made in target-independent code and introducing additional hooks is a bit messy. Testing with clang shows that a -fPIC binary is 600KB smaller than the corresponding -fno-pic build. Separate testing from improved jump table encodings would explain only about 100KB or so. The rest is expected to be a result of more aggressive immediate forming for -fno-pic, where the -fPIC binary just uses TOC entries. This change brings the LLVM output in line with the GCC output, other PPC64 compilers like XLC on AIX are known to produce PIC by default as well. The relocation model can still be provided explicitly, i.e. when using MCJIT. One test case for case (1) is included, other test cases with relocation mode sensitive behavior are wired to static for now. They will be reviewed and adjusted separately. Differential Revision: https://reviews.llvm.org/D26566 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289743 91177308-0d34-0410-b5e6-96231b3b80d8
47 lines
1.6 KiB
LLVM
47 lines
1.6 KiB
LLVM
; RUN: llc -relocation-model=static -verify-machineinstrs -O0 < %s -march=ppc64 -mcpu=ppc64 | FileCheck -check-prefix=OPT0 %s
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; RUN: llc -relocation-model=static -verify-machineinstrs -O1 < %s -march=ppc64 -mcpu=ppc64 | FileCheck -check-prefix=OPT1 %s
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; RUN: llc -verify-machineinstrs -O0 < %s -march=ppc32 -mcpu=ppc | FileCheck -check-prefix=OPT0-PPC32 %s
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target triple = "powerpc64-unknown-linux-gnu"
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@a = thread_local global i32 0, align 4
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;OPT0-LABEL: localexec:
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;OPT1-LABEL: localexec:
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define i32 @localexec() nounwind {
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entry:
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;OPT0: addis [[REG1:[0-9]+]], 13, a@tprel@ha
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;OPT0-NEXT: li [[REG2:[0-9]+]], 42
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;OPT0-NEXT: addi [[REG1]], [[REG1]], a@tprel@l
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;OPT0: stw [[REG2]], 0([[REG1]])
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;OPT1: addis [[REG1:[0-9]+]], 13, a@tprel@ha
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;OPT1-NEXT: li [[REG2:[0-9]+]], 42
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;OPT1-NEXT: stw [[REG2]], a@tprel@l([[REG1]])
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store i32 42, i32* @a, align 4
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ret i32 0
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}
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; Test correct assembly code generation for thread-local storage
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; using the initial-exec model.
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@a2 = external thread_local global i32
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define signext i32 @main2() nounwind {
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entry:
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%retval = alloca i32, align 4
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store i32 0, i32* %retval
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%0 = load i32, i32* @a2, align 4
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ret i32 %0
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}
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; OPT1-LABEL: main2:
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; OPT1: addis [[REG1:[0-9]+]], 2, a2@got@tprel@ha
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; OPT1: ld [[REG2:[0-9]+]], a2@got@tprel@l([[REG1]])
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; OPT1: add {{[0-9]+}}, [[REG2]], a2@tls
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;OPT0-PPC32-LABEL: main2:
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;OPT0-PPC32: li [[REG1:[0-9]+]], _GLOBAL_OFFSET_TABLE_@l
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;OPT0-PPC32: addis [[REG1]], [[REG1]], _GLOBAL_OFFSET_TABLE_@ha
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;OPT0-PPC32: lwz [[REG2:[0-9]+]], a2@got@tprel@l([[REG1]])
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;OPT0-PPC32: add 3, [[REG2]], a2@tls
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