llvm/test/CodeGen/PowerPC/ctrloops.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

99 lines
2.8 KiB
LLVM

target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-freebsd10.0"
; RUN: llc < %s -march=ppc64 -relocation-model=pic | FileCheck %s
@a = common global i32 0, align 4
define void @test1(i32 %c) nounwind {
entry:
br label %for.body
for.body: ; preds = %for.body, %entry
%i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
%0 = load volatile i32, i32* @a, align 4
%add = add nsw i32 %0, %c
store volatile i32 %add, i32* @a, align 4
%inc = add nsw i32 %i.01, 1
%exitcond = icmp eq i32 %inc, 2048
br i1 %exitcond, label %for.end, label %for.body
for.end: ; preds = %for.body
ret void
; CHECK: @test1
; CHECK-NOT: or 3, 3, 3
; CHECK: mtctr
; CHECK-NOT: addi {[0-9]+}
; CHECK-NOT: cmplwi
; CHECK: bdnz
}
define void @test2(i32 %c, i32 %d) nounwind {
entry:
%cmp1 = icmp sgt i32 %d, 0
br i1 %cmp1, label %for.body, label %for.end
for.body: ; preds = %entry, %for.body
%i.02 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
%0 = load volatile i32, i32* @a, align 4
%add = add nsw i32 %0, %c
store volatile i32 %add, i32* @a, align 4
%inc = add nsw i32 %i.02, 1
%exitcond = icmp eq i32 %inc, %d
br i1 %exitcond, label %for.end, label %for.body
for.end: ; preds = %for.body, %entry
ret void
; CHECK: @test2
; CHECK: mtctr
; CHECK-NOT: addi {[0-9]+}
; CHECK-NOT: cmplwi
; CHECK: bdnz
}
define void @test3(i32 %c, i32 %d) nounwind {
entry:
%cmp1 = icmp sgt i32 %d, 0
br i1 %cmp1, label %for.body, label %for.end
for.body: ; preds = %entry, %for.body
%i.02 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
%mul = mul nsw i32 %i.02, %c
%0 = load volatile i32, i32* @a, align 4
%add = add nsw i32 %0, %mul
store volatile i32 %add, i32* @a, align 4
%inc = add nsw i32 %i.02, 1
%exitcond = icmp eq i32 %inc, %d
br i1 %exitcond, label %for.end, label %for.body
for.end: ; preds = %for.body, %entry
ret void
; CHECK: @test3
; CHECK: mtctr
; CHECK-NOT: addi {[0-9]+}
; CHECK-NOT: cmplwi
; CHECK: bdnz
}
@tls_var = external thread_local global i8
define i32 @test4() {
entry:
br label %for.body
for.body: ; preds = %for.body, %entry
%phi = phi i32 [ %dec, %for.body ], [ undef, %entry ]
%load = ptrtoint i8* @tls_var to i32
%dec = add i32 %phi, -1
%cmp = icmp sgt i32 %phi, 1
br i1 %cmp, label %for.body, label %return
return: ; preds = %for.body
ret i32 %load
; CHECK-LABEL: @test4
; CHECK-NOT: mtctr
; CHECK: addi {{[0-9]+}}
; CHECK: cmpwi
; CHECK-NOT: bdnz
; CHECK: bgt
}