llvm/test/CodeGen/PowerPC/p8-isel-sched.ll
Hal Finkel ec716cecda [PowerPC] Better scheduling for isel on P7/P8
isel is actually a cracked instruction on the P7/P8, and must start a dispatch
group. The scheduling model should reflect this so that we don't bunch too many
of them together when possible.

Thanks to Bill Schmidt and Pat Haugen for helping to sort this out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227758 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-01 17:52:16 +00:00

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1.1 KiB
LLVM

; RUN: llc -mcpu=pwr8 < %s | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
; Function Attrs: nounwind
define void @foo(i32* nocapture %r1, i32* nocapture %r2, i32* nocapture %r3, i32* nocapture %r4, i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d) #0 {
entry:
%tobool = icmp ne i32 %a, 0
%cond = select i1 %tobool, i32 %b, i32 %c
store i32 %cond, i32* %r1, align 4
%cond5 = select i1 %tobool, i32 %b, i32 %d
store i32 %cond5, i32* %r2, align 4
%add = add nsw i32 %b, 1
%sub = add nsw i32 %d, -2
%cond10 = select i1 %tobool, i32 %add, i32 %sub
store i32 %cond10, i32* %r3, align 4
%add13 = add nsw i32 %b, 3
%sub15 = add nsw i32 %d, -5
%cond17 = select i1 %tobool, i32 %add13, i32 %sub15
store i32 %cond17, i32* %r4, align 4
ret void
}
; Make sure that we don't schedule all of the isels together, they should be
; intermixed with the adds because each isel starts a new dispatch group.
; CHECK-LABEL: @foo
; CHECK: isel
; CHECK: addi
; CHECK: isel
; CHECK: blr
attributes #0 = { nounwind }