mirror of
https://github.com/RPCSX/llvm.git
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f097e134b1
These folds already have tests for scalar and vector types, except for the vector div-by-0 case, so I'm adding tests for that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280115 91177308-0d34-0410-b5e6-96231b3b80d8
363 lines
5.8 KiB
LLVM
363 lines
5.8 KiB
LLVM
; RUN: opt -instsimplify -S < %s | FileCheck %s
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define i64 @test0() {
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; CHECK-LABEL: @test0(
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; CHECK: ret i64 undef
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;
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%r = mul i64 undef, undef
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ret i64 %r
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}
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define i64 @test1() {
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; CHECK-LABEL: @test1(
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; CHECK: ret i64 undef
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;
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%r = mul i64 3, undef
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ret i64 %r
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}
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define i64 @test2() {
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; CHECK-LABEL: @test2(
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; CHECK: ret i64 undef
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;
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%r = mul i64 undef, 3
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ret i64 %r
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}
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define i64 @test3() {
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; CHECK-LABEL: @test3(
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; CHECK: ret i64 0
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;
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%r = mul i64 undef, 6
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ret i64 %r
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}
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define i64 @test4() {
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; CHECK-LABEL: @test4(
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; CHECK: ret i64 0
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;
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%r = mul i64 6, undef
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ret i64 %r
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}
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define i64 @test5() {
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; CHECK-LABEL: @test5(
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; CHECK: ret i64 undef
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;
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%r = and i64 undef, undef
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ret i64 %r
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}
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define i64 @test6() {
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; CHECK-LABEL: @test6(
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; CHECK: ret i64 undef
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;
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%r = or i64 undef, undef
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ret i64 %r
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}
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define i64 @test7() {
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; CHECK-LABEL: @test7(
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; CHECK: ret i64 undef
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;
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%r = udiv i64 undef, 1
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ret i64 %r
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}
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define i64 @test8() {
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; CHECK-LABEL: @test8(
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; CHECK: ret i64 undef
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;
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%r = sdiv i64 undef, 1
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ret i64 %r
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}
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define i64 @test9() {
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; CHECK-LABEL: @test9(
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; CHECK: ret i64 0
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;
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%r = urem i64 undef, 1
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ret i64 %r
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}
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define i64 @test10() {
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; CHECK-LABEL: @test10(
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; CHECK: ret i64 0
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;
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%r = srem i64 undef, 1
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ret i64 %r
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}
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define i64 @test11() {
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; CHECK-LABEL: @test11(
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; CHECK: ret i64 undef
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;
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%r = shl i64 undef, undef
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ret i64 %r
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}
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define i64 @test11b(i64 %a) {
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; CHECK-LABEL: @test11b(
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; CHECK: ret i64 undef
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;
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%r = shl i64 %a, undef
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ret i64 %r
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}
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define i64 @test12() {
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; CHECK-LABEL: @test12(
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; CHECK: ret i64 undef
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;
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%r = ashr i64 undef, undef
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ret i64 %r
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}
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define i64 @test12b(i64 %a) {
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; CHECK-LABEL: @test12b(
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; CHECK: ret i64 undef
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;
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%r = ashr i64 %a, undef
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ret i64 %r
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}
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define i64 @test13() {
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; CHECK-LABEL: @test13(
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; CHECK: ret i64 undef
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;
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%r = lshr i64 undef, undef
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ret i64 %r
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}
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define i64 @test13b(i64 %a) {
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; CHECK-LABEL: @test13b(
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; CHECK: ret i64 undef
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;
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%r = lshr i64 %a, undef
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ret i64 %r
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}
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define i1 @test14() {
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; CHECK-LABEL: @test14(
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; CHECK: ret i1 undef
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;
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%r = icmp slt i64 undef, undef
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ret i1 %r
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}
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define i1 @test15() {
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; CHECK-LABEL: @test15(
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; CHECK: ret i1 undef
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;
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%r = icmp ult i64 undef, undef
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ret i1 %r
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}
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define i64 @test16(i64 %a) {
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; CHECK-LABEL: @test16(
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; CHECK: ret i64 undef
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;
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%r = select i1 undef, i64 %a, i64 undef
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ret i64 %r
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}
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define i64 @test17(i64 %a) {
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; CHECK-LABEL: @test17(
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; CHECK: ret i64 undef
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;
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%r = select i1 undef, i64 undef, i64 %a
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ret i64 %r
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}
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define i64 @test18(i64 %a) {
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; CHECK-LABEL: @test18(
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; CHECK: [[R:%.*]] = call i64 undef(i64 %a)
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; CHECK-NEXT: ret i64 undef
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;
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%r = call i64 (i64) undef(i64 %a)
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ret i64 %r
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}
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define <4 x i8> @test19(<4 x i8> %a) {
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; CHECK-LABEL: @test19(
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; CHECK: ret <4 x i8> undef
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;
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%b = shl <4 x i8> %a, <i8 8, i8 9, i8 undef, i8 -1>
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ret <4 x i8> %b
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}
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define i32 @test20(i32 %a) {
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; CHECK-LABEL: @test20(
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; CHECK: ret i32 undef
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;
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%b = udiv i32 %a, 0
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ret i32 %b
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}
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define <2 x i32> @test20vec(<2 x i32> %a) {
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; CHECK-LABEL: @test20vec(
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; CHECK-NEXT: ret <2 x i32> undef
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;
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%b = udiv <2 x i32> %a, zeroinitializer
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ret <2 x i32> %b
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}
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define i32 @test21(i32 %a) {
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; CHECK-LABEL: @test21(
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; CHECK: ret i32 undef
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;
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%b = sdiv i32 %a, 0
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ret i32 %b
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}
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define <2 x i32> @test21vec(<2 x i32> %a) {
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; CHECK-LABEL: @test21vec(
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; CHECK-NEXT: ret <2 x i32> undef
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;
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%b = sdiv <2 x i32> %a, zeroinitializer
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ret <2 x i32> %b
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}
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define i32 @test22(i32 %a) {
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; CHECK-LABEL: @test22(
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; CHECK: ret i32 undef
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;
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%b = ashr exact i32 undef, %a
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ret i32 %b
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}
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define i32 @test23(i32 %a) {
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; CHECK-LABEL: @test23(
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; CHECK: ret i32 undef
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;
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%b = lshr exact i32 undef, %a
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ret i32 %b
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}
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define i32 @test24() {
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; CHECK-LABEL: @test24(
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; CHECK: ret i32 undef
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;
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%b = udiv i32 undef, 0
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ret i32 %b
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}
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define i32 @test25() {
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; CHECK-LABEL: @test25(
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; CHECK: ret i32 undef
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;
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%b = lshr i32 0, undef
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ret i32 %b
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}
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define i32 @test26() {
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; CHECK-LABEL: @test26(
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; CHECK: ret i32 undef
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;
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%b = ashr i32 0, undef
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ret i32 %b
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}
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define i32 @test27() {
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; CHECK-LABEL: @test27(
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; CHECK: ret i32 undef
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;
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%b = shl i32 0, undef
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ret i32 %b
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}
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define i32 @test28(i32 %a) {
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; CHECK-LABEL: @test28(
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; CHECK: ret i32 undef
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;
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%b = shl nsw i32 undef, %a
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ret i32 %b
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}
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define i32 @test29(i32 %a) {
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; CHECK-LABEL: @test29(
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; CHECK: ret i32 undef
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;
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%b = shl nuw i32 undef, %a
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ret i32 %b
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}
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define i32 @test30(i32 %a) {
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; CHECK-LABEL: @test30(
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; CHECK: ret i32 undef
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;
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%b = shl nsw nuw i32 undef, %a
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ret i32 %b
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}
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define i32 @test31(i32 %a) {
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; CHECK-LABEL: @test31(
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; CHECK: ret i32 0
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;
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%b = shl i32 undef, %a
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ret i32 %b
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}
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define i32 @test32(i32 %a) {
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; CHECK-LABEL: @test32(
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; CHECK: ret i32 undef
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;
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%b = shl i32 undef, 0
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ret i32 %b
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}
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define i32 @test33(i32 %a) {
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; CHECK-LABEL: @test33(
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; CHECK: ret i32 undef
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;
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%b = ashr i32 undef, 0
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ret i32 %b
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}
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define i32 @test34(i32 %a) {
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; CHECK-LABEL: @test34(
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; CHECK: ret i32 undef
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;
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%b = lshr i32 undef, 0
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ret i32 %b
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}
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define i32 @test35(<4 x i32> %V) {
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; CHECK-LABEL: @test35(
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; CHECK: ret i32 undef
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;
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%b = extractelement <4 x i32> %V, i32 4
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ret i32 %b
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}
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define i32 @test36(i32 %V) {
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; CHECK-LABEL: @test36(
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; CHECK: ret i32 undef
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;
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%b = extractelement <4 x i32> undef, i32 %V
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ret i32 %b
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}
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define i32 @test37() {
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; CHECK-LABEL: @test37(
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; CHECK: ret i32 undef
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;
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%b = udiv i32 undef, undef
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ret i32 %b
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}
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define i32 @test38(i32 %a) {
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; CHECK-LABEL: @test38(
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; CHECK: ret i32 undef
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;
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%b = udiv i32 %a, undef
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ret i32 %b
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}
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define i32 @test39() {
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; CHECK-LABEL: @test39(
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; CHECK: ret i32 undef
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;
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%b = udiv i32 0, undef
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ret i32 %b
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}
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