Tim Northover 6e490efa61 ARM: use callee-saved list in the order they're actually saved. ... When setting the frame pointer, the offset from SP is calculated based on the stack slot it gets allocated, but this slot is in turn based on the order of the CSR list so that list should match the order we actually save the registers in. Mostly it did, but in the edge-case of MachO AAPCS targets it was wrong. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269459 91177308-0d34-0410-b5e6-96231b3b80d8		2016-05-13 19:16:14 +00:00
..
Analysis	[SCEVExpander] Fix a failed cast<> assertion	2016-05-11 17:41:41 +00:00
Assembler
Bindings
Bitcode
BugPoint
CodeGen	ARM: use callee-saved list in the order they're actually saved.	2016-05-13 19:16:14 +00:00
DebugInfo	[codeview] Dump the type index on the first line of each record	2016-05-13 17:48:24 +00:00
Examples
ExecutionEngine	[RuntimeDyld] Support R_390_PC64 relocation type	2016-05-13 17:23:48 +00:00
Feature
FileCheck
Instrumentation	Add missing tests for new PM	2016-05-10 23:37:19 +00:00
Integer
JitListener
LibDriver
Linker
LTO
MC	add support for -print-imm-hex for AArch64	2016-05-13 18:00:09 +00:00
Object
ObjectYAML	[obj2yaml] [yaml2obj] Basic support for MachO::load_command	2016-05-13 17:41:41 +00:00
Other
SymbolRewriter
TableGen
ThinLTO/X86
tools	add support for -print-imm-hex for AArch64	2016-05-13 18:00:09 +00:00
Transforms	regenerate checks and add a run to show missed shrinkage	2016-05-13 18:04:39 +00:00
Unit
Verifier	All llvm.deoptimize declarations must use the same calling convention	2016-05-12 01:17:38 +00:00
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
TestRunner.sh