llvm/test/CodeGen/MSP430/Inst16rm.ll
Vadzim Dambrouski c5a81e8618 [MSP430] Add SRet support to MSP430 target
This patch adds support for struct return values to the MSP430
target backend. It also reverses the order of argument and return
registers in the calling convention to bring it into closer
alignment with the published EABI from TI.

Patch by Andrew Wygle (awygle).

Differential Revision: https://reviews.llvm.org/D29069

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296807 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-02 20:25:10 +00:00

47 lines
938 B
LLVM

; RUN: llc -march=msp430 < %s | FileCheck %s
target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
target triple = "msp430-generic-generic"
@foo = common global i16 0, align 2
define i16 @add(i16 %a) nounwind {
; CHECK-LABEL: add:
; CHECK: add.w &foo, r12
%1 = load i16, i16* @foo
%2 = add i16 %a, %1
ret i16 %2
}
define i16 @and(i16 %a) nounwind {
; CHECK-LABEL: and:
; CHECK: and.w &foo, r12
%1 = load i16, i16* @foo
%2 = and i16 %a, %1
ret i16 %2
}
define i16 @bis(i16 %a) nounwind {
; CHECK-LABEL: bis:
; CHECK: bis.w &foo, r12
%1 = load i16, i16* @foo
%2 = or i16 %a, %1
ret i16 %2
}
define i16 @bic(i16 %a) nounwind {
; CHECK-LABEL: bic:
; CHECK: bic.w &foo, r12
%1 = load i16, i16* @foo
%2 = xor i16 %1, -1
%3 = and i16 %a, %2
ret i16 %3
}
define i16 @xor(i16 %a) nounwind {
; CHECK-LABEL: xor:
; CHECK: xor.w &foo, r12
%1 = load i16, i16* @foo
%2 = xor i16 %a, %1
ret i16 %2
}