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bde073f537
The backend has been around for years, it's pretty ridiculous that we can't even use the preferred form for printing "MOV" aliases. Unfortunately, TableGen can't handle the complex predicates when printing so it's a bunch of nasty C++. Oh well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272865 91177308-0d34-0410-b5e6-96231b3b80d8
203 lines
5.1 KiB
LLVM
203 lines
5.1 KiB
LLVM
; RUN: llc < %s -march=arm64 | FileCheck %s
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;==--------------------------------------------------------------------------==
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; Tests for MOV-immediate implemented with ORR-immediate.
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;==--------------------------------------------------------------------------==
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; 64-bit immed with 32-bit pattern size, rotated by 0.
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define i64 @test64_32_rot0() nounwind {
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; CHECK-LABEL: test64_32_rot0:
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; CHECK: mov x0, #30064771079
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ret i64 30064771079
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}
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; 64-bit immed with 32-bit pattern size, rotated by 2.
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define i64 @test64_32_rot2() nounwind {
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; CHECK-LABEL: test64_32_rot2:
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; CHECK: mov x0, #-4611686002321260541
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ret i64 13835058071388291075
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}
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; 64-bit immed with 4-bit pattern size, rotated by 3.
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define i64 @test64_4_rot3() nounwind {
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; CHECK-LABEL: test64_4_rot3:
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; CHECK: mov x0, #-1229782938247303442
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ret i64 17216961135462248174
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}
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; 32-bit immed with 32-bit pattern size, rotated by 16.
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define i32 @test32_32_rot16() nounwind {
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; CHECK-LABEL: test32_32_rot16:
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; CHECK: orr w0, wzr, #0xff0000
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ret i32 16711680
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}
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; 32-bit immed with 2-bit pattern size, rotated by 1.
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define i32 @test32_2_rot1() nounwind {
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; CHECK-LABEL: test32_2_rot1:
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; CHECK: mov w0, #-1431655766
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ret i32 2863311530
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}
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;==--------------------------------------------------------------------------==
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; Tests for MOVZ with MOVK.
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;==--------------------------------------------------------------------------==
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define i32 @movz() nounwind {
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; CHECK-LABEL: movz:
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; CHECK: mov w0, #5
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ret i32 5
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}
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define i64 @movz_3movk() nounwind {
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; CHECK-LABEL: movz_3movk:
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; CHECK: mov x0, #1407374883553280
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; CHECK-NEXT: movk x0, #4660, lsl #32
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; CHECK-NEXT: movk x0, #43981, lsl #16
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; CHECK-NEXT: movk x0, #22136
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ret i64 1427392313513592
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}
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define i64 @movz_movk_skip1() nounwind {
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; CHECK-LABEL: movz_movk_skip1:
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; CHECK: mov x0, #21474836480
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; CHECK-NEXT: movk x0, #17185, lsl #16
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ret i64 22601072640
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}
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define i64 @movz_skip1_movk() nounwind {
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; CHECK-LABEL: movz_skip1_movk:
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; CHECK: mov x0, #147695335374848
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; CHECK-NEXT: movk x0, #4660
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ret i64 147695335379508
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}
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;==--------------------------------------------------------------------------==
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; Tests for MOVN with MOVK.
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;==--------------------------------------------------------------------------==
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define i64 @movn() nounwind {
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; CHECK-LABEL: movn:
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; CHECK: mov x0, #-42
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ret i64 -42
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}
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define i64 @movn_skip1_movk() nounwind {
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; CHECK-LABEL: movn_skip1_movk:
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; CHECK: mov x0, #-176093659137
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; CHECK-NEXT: movk x0, #4660
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ret i64 -176093720012
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}
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;==--------------------------------------------------------------------------==
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; Tests for ORR with MOVK.
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;==--------------------------------------------------------------------------==
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; rdar://14987673
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define i64 @orr_movk1() nounwind {
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; CHECK-LABEL: orr_movk1:
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; CHECK: mov x0, #72056494543077120
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; CHECK: movk x0, #57005, lsl #16
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ret i64 72056498262245120
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}
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define i64 @orr_movk2() nounwind {
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; CHECK-LABEL: orr_movk2:
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; CHECK: mov x0, #72056494543077120
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; CHECK: movk x0, #57005, lsl #48
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ret i64 -2400982650836746496
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}
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define i64 @orr_movk3() nounwind {
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; CHECK-LABEL: orr_movk3:
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; CHECK: mov x0, #72056494543077120
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; CHECK: movk x0, #57005, lsl #32
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ret i64 72020953688702720
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}
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define i64 @orr_movk4() nounwind {
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; CHECK-LABEL: orr_movk4:
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; CHECK: mov x0, #72056494543077120
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; CHECK: movk x0, #57005
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ret i64 72056494543068845
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}
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; rdar://14987618
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define i64 @orr_movk5() nounwind {
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; CHECK-LABEL: orr_movk5:
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; CHECK: mov x0, #-71777214294589696
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; CHECK: movk x0, #57005, lsl #16
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ret i64 -71777214836900096
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}
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define i64 @orr_movk6() nounwind {
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; CHECK-LABEL: orr_movk6:
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; CHECK: mov x0, #-71777214294589696
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; CHECK: movk x0, #57005, lsl #16
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; CHECK: movk x0, #57005, lsl #48
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ret i64 -2400982647117578496
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}
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define i64 @orr_movk7() nounwind {
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; CHECK-LABEL: orr_movk7:
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; CHECK: mov x0, #-71777214294589696
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; CHECK: movk x0, #57005, lsl #48
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ret i64 -2400982646575268096
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}
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define i64 @orr_movk8() nounwind {
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; CHECK-LABEL: orr_movk8:
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; CHECK: mov x0, #-71777214294589696
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; CHECK: movk x0, #57005
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; CHECK: movk x0, #57005, lsl #48
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ret i64 -2400982646575276371
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}
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; rdar://14987715
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define i64 @orr_movk9() nounwind {
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; CHECK-LABEL: orr_movk9:
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; CHECK: mov x0, #1152921435887370240
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; CHECK: movk x0, #65280
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; CHECK: movk x0, #57005, lsl #16
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ret i64 1152921439623315200
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}
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define i64 @orr_movk10() nounwind {
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; CHECK-LABEL: orr_movk10:
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; CHECK: mov x0, #1152921504606846720
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; CHECK: movk x0, #57005, lsl #16
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ret i64 1152921504047824640
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}
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define i64 @orr_movk11() nounwind {
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; CHECK-LABEL: orr_movk11:
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; CHECK: mov x0, #-4503599627370241
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; CHECK: movk x0, #57005, lsl #16
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; CHECK: movk x0, #65535, lsl #32
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ret i64 -4222125209747201
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}
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define i64 @orr_movk12() nounwind {
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; CHECK-LABEL: orr_movk12:
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; CHECK: mov x0, #-4503599627370241
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; CHECK: movk x0, #57005, lsl #32
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ret i64 -4258765016661761
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}
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define i64 @orr_movk13() nounwind {
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; CHECK-LABEL: orr_movk13:
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; CHECK: mov x0, #17592169267200
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; CHECK: movk x0, #57005
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; CHECK: movk x0, #57005, lsl #48
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ret i64 -2401245434149282131
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}
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; rdar://13944082
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define i64 @g() nounwind {
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; CHECK-LABEL: g:
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; CHECK: mov x0, #-281474976710656
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; CHECK: movk x0, #2
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entry:
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ret i64 -281474976710654
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}
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