llvm/test/CodeGen/Hexagon/inline-asm-i1.ll
Krzysztof Parzyszek 5e464c99af [Hexagon] Add RUN line to test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279304 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 19:36:35 +00:00

15 lines
424 B
LLVM

; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK: r[[REG0:[0-9]+]] = usr
; CHECK: [[REG0]] = insert(r{{[0-9]+}}, #1, #16)
target triple = "hexagon"
define hidden void @fred() #0 {
entry:
%0 = call { i32, i32 } asm sideeffect " $0 = usr\0A $1 = $2\0A $0 = insert($1, #1, #16)\0Ausr = $0 \0A", "=&r,=&r,r"(i1 undef) #1
ret void
}
attributes #0 = { nounwind "target-cpu"="hexagonv60" }
attributes #1 = { nounwind }