llvm/test/CodeGen/Hexagon/swp-dag-phi.ll
Brendon Cahoon c1359c9fbb MachinePipeliner pass that implements Swing Modulo Scheduling
Software pipelining is an optimization for improving ILP by
overlapping loop iterations. Swing Modulo Scheduling (SMS) is
an implementation of software pipelining that attempts to
reduce register pressure and generate efficient pipelines with
a low compile-time cost.

This implementaion of SMS is a target-independent back-end pass.
When enabled, the pass should run just prior to the register
allocation pass, while the machine IR is in SSA form. If the pass
is successful, then the original loop is replaced by the optimized
loop. The optimized loop contains one or more prolog blocks, the
pipelined kernel, and one or more epilog blocks.

This pass is enabled for Hexagon only. To enable for other targets,
a couple of target specific hooks must be implemented, and the
pass needs to be called from the target's TargetMachine
implementation.

Differential Review: http://reviews.llvm.org/D16829


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277169 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-29 16:44:44 +00:00

43 lines
1.4 KiB
LLVM

; RUN: llc -march=hexagon -mcpu=hexagonv5 -enable-pipeliner -pipeliner-max-stages=2 < %s
; REQUIRES: asserts
; This tests check that a dependence is created between a Phi and it's uses.
; An assert occurs if the Phi dependences are not correct.
define void @test1(i32* %f2, i32 %nc) {
entry:
%i.011 = add i32 %nc, -1
%cmp12 = icmp sgt i32 %i.011, 1
br i1 %cmp12, label %for.body.preheader, label %for.end
for.body.preheader:
%0 = add i32 %nc, -2
%scevgep = getelementptr i32, i32* %f2, i32 %0
%sri = load i32, i32* %scevgep, align 4
%scevgep15 = getelementptr i32, i32* %f2, i32 %i.011
%sri16 = load i32, i32* %scevgep15, align 4
br label %for.body
for.body:
%i.014 = phi i32 [ %i.0, %for.body ], [ %i.011, %for.body.preheader ]
%i.0.in13 = phi i32 [ %i.014, %for.body ], [ %nc, %for.body.preheader ]
%sr = phi i32 [ %1, %for.body ], [ %sri, %for.body.preheader ]
%sr17 = phi i32 [ %sr, %for.body ], [ %sri16, %for.body.preheader ]
%arrayidx = getelementptr inbounds i32, i32* %f2, i32 %i.014
%sub1 = add nsw i32 %i.0.in13, -3
%arrayidx2 = getelementptr inbounds i32, i32* %f2, i32 %sub1
%1 = load i32, i32* %arrayidx2, align 4
%sub3 = sub nsw i32 %sr17, %1
store i32 %sub3, i32* %arrayidx, align 4
%i.0 = add nsw i32 %i.014, -1
%cmp = icmp sgt i32 %i.0, 1
br i1 %cmp, label %for.body, label %for.end.loopexit
for.end.loopexit:
br label %for.end
for.end:
ret void
}