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https://github.com/RPCSX/llvm.git
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f51190b697
"b + ((a < b) ? 1 : 0)" compiles into cmpl %esi, %edi adcl $0, %esi instead of cmpl %esi, %edi sbbl %eax, %eax andl $1, %eax addl %esi, %eax This saves a register, a false dependency on %eax (Intel's CPUs still don't ignore it) and it's shorter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131070 91177308-0d34-0410-b5e6-96231b3b80d8
83 lines
1.6 KiB
LLVM
83 lines
1.6 KiB
LLVM
; RUN: llc -march=x86-64 < %s | FileCheck %s
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define i8 @test1(i8 %a, i8 %b) nounwind {
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%cmp = icmp ult i8 %a, %b
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%cond = zext i1 %cmp to i8
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%add = add i8 %cond, %b
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ret i8 %add
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; CHECK: test1:
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; CHECK: adcb $0
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}
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define i32 @test2(i32 %a, i32 %b) nounwind {
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%cmp = icmp ult i32 %a, %b
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%cond = zext i1 %cmp to i32
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%add = add i32 %cond, %b
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ret i32 %add
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; CHECK: test2:
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; CHECK: adcl $0
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}
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define i64 @test3(i64 %a, i64 %b) nounwind {
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%cmp = icmp ult i64 %a, %b
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%conv = zext i1 %cmp to i64
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%add = add i64 %conv, %b
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ret i64 %add
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; CHECK: test3:
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; CHECK: adcq $0
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}
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define i8 @test4(i8 %a, i8 %b) nounwind {
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%cmp = icmp ult i8 %a, %b
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%cond = zext i1 %cmp to i8
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%sub = sub i8 %b, %cond
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ret i8 %sub
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; CHECK: test4:
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; CHECK: sbbb $0
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}
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define i32 @test5(i32 %a, i32 %b) nounwind {
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%cmp = icmp ult i32 %a, %b
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%cond = zext i1 %cmp to i32
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%sub = sub i32 %b, %cond
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ret i32 %sub
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; CHECK: test5:
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; CHECK: sbbl $0
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}
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define i64 @test6(i64 %a, i64 %b) nounwind {
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%cmp = icmp ult i64 %a, %b
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%conv = zext i1 %cmp to i64
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%sub = sub i64 %b, %conv
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ret i64 %sub
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; CHECK: test6:
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; CHECK: sbbq $0
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}
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define i8 @test7(i8 %a, i8 %b) nounwind {
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%cmp = icmp ult i8 %a, %b
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%cond = sext i1 %cmp to i8
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%sub = sub i8 %b, %cond
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ret i8 %sub
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; CHECK: test7:
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; CHECK: adcb $0
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}
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define i32 @test8(i32 %a, i32 %b) nounwind {
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%cmp = icmp ult i32 %a, %b
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%cond = sext i1 %cmp to i32
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%sub = sub i32 %b, %cond
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ret i32 %sub
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; CHECK: test8:
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; CHECK: adcl $0
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}
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define i64 @test9(i64 %a, i64 %b) nounwind {
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%cmp = icmp ult i64 %a, %b
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%conv = sext i1 %cmp to i64
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%sub = sub i64 %b, %conv
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ret i64 %sub
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; CHECK: test9:
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; CHECK: adcq $0
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}
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