Misha Brukman 79caf1fe26 Add prototypes to add passes to JIT compilation and code emission. ...

Also, added annotations to how instructions are modified (reg/imm operands).
Added prototype for adding register numbers to values pass for interfacing with
the target-independent register allocators in the JIT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6366 91177308-0d34-0410-b5e6-96231b3b80d8

2003-05-27 22:01:10 +00:00

..

CBackend

Add support for setjmp/longjmp primitives

2003-05-17 22:26:33 +00:00

SparcV9

Add prototypes to add passes to JIT compilation and code emission.

2003-05-27 22:01:10 +00:00

X86

Renamed opIsDef to opIsDefOnly.

2003-05-27 00:03:17 +00:00

Makefile

X86 target builds fine now

2002-11-20 20:17:03 +00:00

MRegisterInfo.cpp

Capture more information in ctor

2002-12-28 20:34:18 +00:00

TargetData.cpp

* Fix divide by zero error with empty structs

2003-05-21 18:08:44 +00:00

TargetInstrInfo.cpp

Rename MachineInstrInfo -> TargetInstrInfo

2003-01-14 22:00:31 +00:00

TargetMachine.cpp

The promotion rules are the same for all targets, they are set by the C standard.

2003-04-26 19:47:36 +00:00

TargetSchedInfo.cpp

More renamings of Target/Machine*Info to Target/Target*Info

2002-12-29 03:13:05 +00:00