Reid Kleckner 7c6ef2a299 [IR] Assert that we never create an empty AttributeListImpl, NFC ...

Delete following conditional that is always true as a result.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300117 91177308-0d34-0410-b5e6-96231b3b80d8

2017-04-12 22:22:01 +00:00

..

Analysis

[LoopVectorizer, TTI] New method supportsEfficientVectorElementLoadStore()

2017-04-12 12:41:37 +00:00

AsmParser

[IR] Add AttributeSet to hide AttributeSetNode* again, NFC

2017-04-12 00:38:00 +00:00

Bitcode

Bitcode: Move version and global value module code parsers to separate functions. NFCI.

2017-04-12 20:02:09 +00:00

CodeGen

[SelectionDAG] Use APInt move assignment to avoid 2 memory allocations and copies when bit width is larger than 64-bits.

2017-04-12 18:39:27 +00:00

DebugInfo

[DWARF] Fix compiler warnings in DWARFContext.cpp, NFCi

2017-04-12 11:33:26 +00:00

Demangle

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ExecutionEngine

[IR] Redesign the case iterator in SwitchInst to actually be an iterator

2017-04-12 07:27:28 +00:00

Fuzzer

[libFuzzer] fix type in signal name.

2017-04-11 18:20:05 +00:00

IR

[IR] Assert that we never create an empty AttributeListImpl, NFC

2017-04-12 22:22:01 +00:00

IRReader

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LibDriver

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LineEditor

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Linker

[Linker] Provide callback for internalization

2017-03-13 18:08:11 +00:00

LTO

LTO: call getRealLinkageName on IRNames before feeding to getGUID

2017-03-31 21:56:30 +00:00

MC

MC: Remove unused virtual function MCObjectWriter::isWeak. NFC.

2017-04-08 23:35:49 +00:00

Object

Remove unused functions. Remove static qualifier from functions in header files. NFC.

2017-04-11 14:55:32 +00:00

ObjectYAML

Add virtual destructor to WasmYAML::Section or avoid memory leak

2017-03-31 22:14:14 +00:00

Option

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Passes

MemorySSA: Move to Analysis, from Transforms/Utils. It's used as

2017-04-11 20:06:36 +00:00

ProfileData

[PGO] Memory intrinsic calls optimization based on profiled size

2017-04-04 16:42:20 +00:00

Support

Fix detection of backtrace() availability on FreeBSD

2017-04-12 13:51:00 +00:00

TableGen

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Target

AMDGPU: Fix invalid copies when copying i1 to phys reg

2017-04-12 21:58:23 +00:00

Transforms

[InstCombine] Teach SimplifyMultipleUseDemandedBits to handle And/Or/Xor known bits using the LHS/RHS known bits it already acquired without recursing back into computeKnownBits.

2017-04-12 19:32:47 +00:00

XRay

[XRay] - Fix spelling error to test commit access.

2017-04-06 03:32:01 +00:00

CMakeLists.txt

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LLVMBuild.txt

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