Adrian Prantl 7deb7ebf88 Teach ARMLoadStoreOptimizer to ignore DBG_VALUE instructions when merging ...

instructions.

As noted in PR24563.
rdar://problem/23963293

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256183 91177308-0d34-0410-b5e6-96231b3b80d8

2015-12-21 19:25:03 +00:00

..

AArch64

MIR Serialization: Use the global value syntax for global value memory operands.

2015-08-20 00:20:03 +00:00

AMDGPU

MIR Serialization: Change MIR syntax - use custom syntax for MBBs.

2015-08-13 23:10:16 +00:00

ARM

Teach ARMLoadStoreOptimizer to ignore DBG_VALUE instructions when merging

2015-12-21 19:25:03 +00:00

Generic

MIR Serialization: Change MIR syntax - use custom syntax for MBBs.

2015-08-13 23:10:16 +00:00

Mips

[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.

2015-10-15 14:34:23 +00:00

NVPTX

MIR Serialization: Change MIR syntax - use custom syntax for MBBs.

2015-08-13 23:10:16 +00:00

PowerPC

Fix PR 24724 - The implicit register verifier shouldn't assume certain operand

2015-09-10 14:04:34 +00:00

X86

Replace all weight-based interfaces in MBB with probability-based interfaces, and update all uses of old interfaces.

2015-12-01 05:29:22 +00:00

lit.local.cfg

Resubmit r237954 (MIR Serialization: print and parse LLVM IR using MIR format).

2015-05-27 18:02:19 +00:00