llvm/test/CodeGen/Mips/micromips-or16.ll
Zoran Jovanovic 2611181b30 [mips][microMIPS] Prevent usage of OR16_MMR6 instruction when code for microMIPS is generated.
Author: milena.vujosevic.janicic
Reviewers: dsanders
Differential Revision: http://reviews.llvm.org/D17373


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262725 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-04 17:34:31 +00:00

24 lines
595 B
LLVM

; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \
; RUN: -relocation-model=pic -O3 < %s | FileCheck %s
; RUN: llc -O0 -march=mips -mcpu=mips32r2 -mattr=+micromips \
; RUN: -asm-show-inst < %s | FileCheck %s
; Branch instruction added to enable FastISel::selectOperator
; to select OR instruction
define i32 @f1(i32 signext %a, i32 signext %b) {
; CHECK-LABEL: f1
; CHECK-NOT: OR16_MMR6
%1 = or i32 %a, %b
br label %b1
b1:
ret i32 %1
}
define i32 @f2(i32 signext %a, i32 signext %b) {
entry:
; CHECK-LABEL: f2
; CHECK: or16
%0 = or i32 %a, %b
ret i32 %0
}