llvm/test/CodeGen/CellSPU/arg_ret.ll
Kalle Raiskila 7ea1ab5f41 Fix memory access lowering on SPU, adding
support for the case where alignment<value size.

These cases were silently miscompiled before this patch.
Now they are overly verbose -especially storing is- and
any front-end should still avoid misaligned memory 
accesses as much as possible. The bit juggling algorithm
added here probably has some room for improvement still.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 10:14:03 +00:00

35 lines
1.1 KiB
LLVM

; Test parameter passing and return values
;RUN: llc --march=cellspu %s -o - | FileCheck %s
; this fits into registers r3-r74
%paramstruct = type { i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,
i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,
i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,
i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,
i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,
i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32}
define ccc i32 @test_regs( %paramstruct %prm )
{
;CHECK: lr $3, $74
;CHECK: bi $lr
%1 = extractvalue %paramstruct %prm, 71
ret i32 %1
}
define ccc i32 @test_regs_and_stack( %paramstruct %prm, i32 %stackprm )
{
;CHECK-NOT: a $3, $74, $75
%1 = extractvalue %paramstruct %prm, 71
%2 = add i32 %1, %stackprm
ret i32 %2
}
define ccc %paramstruct @test_return( i32 %param, %paramstruct %prm )
{
;CHECK: lqd {{\$[0-9]+}}, 80($sp)
;CHECK-NOT: ori {{\$[0-9]+, \$[0-9]+, 0}}
;CHECK: lr $3, $4
ret %paramstruct %prm
}