Chris Lattner caa8870fe0 finally remove the immAllOnesV_bc/immAllZerosV_bc patterns ...

and those derived from them.  These are obnoxious because
they were written as: PatLeaf<(bitconvert).  Not having an
argument was foiling adding better type checking for operand
count matching up with what was required (in this case,
bitconvert always requires an operand!)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99759 91177308-0d34-0410-b5e6-96231b3b80d8

2010-03-28 08:43:23 +00:00

..

CallingConvLower.cpp

Change errs() to dbgs().

2010-01-05 01:24:50 +00:00

CMakeLists.txt

Rename SelectionDAGLowering to SelectionDAGBuilder, and rename

2009-11-23 18:04:58 +00:00

DAGCombiner.cpp

fix PR6533 by updating the br(xor) code to remember the case

2010-03-10 23:46:44 +00:00

FastISel.cpp

Remove dead include.

2010-03-11 02:28:48 +00:00

FunctionLoweringInfo.cpp

Forgot the part where we handle the ".llvm.eh.catch.all.value".

2010-03-27 01:24:30 +00:00

FunctionLoweringInfo.h

Move CopyCatchInfo into FunctionLoweringInfo.cpp too, for consistency.

2009-11-23 18:12:11 +00:00

InstrEmitter.cpp

LiveVariables should clear kill / dead markers first. This allows us to remove a hack in the scheduler.

2010-03-26 02:12:24 +00:00

InstrEmitter.h

reapply 99444/99445, which I speculatively reverted in

2010-03-25 04:41:16 +00:00

LegalizeDAG.cpp

Get rid of target-specific nodes for fp16 <-> fp32 conversion.

2010-03-18 22:35:37 +00:00

LegalizeFloatTypes.cpp

Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodes

2010-03-14 21:08:40 +00:00

LegalizeIntegerTypes.cpp

Revert 99335. getTypeToExpandTo's iterative behavior is actually

2010-03-23 22:44:42 +00:00

LegalizeTypes.cpp

Remove dead parameter passing.

2010-03-02 01:55:18 +00:00

LegalizeTypes.h

Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodes

2010-03-14 21:08:40 +00:00

LegalizeTypesGeneric.cpp

Add non-temporal flags and remove an assumption of default arguments.

2010-02-15 17:00:31 +00:00

LegalizeVectorOps.cpp

Revert an earlier change to SIGN_EXTEND_INREG for vectors. The VTSDNode

2010-01-09 02:13:55 +00:00

LegalizeVectorTypes.cpp

Fixed a widening bug where we were not using the correct size for the load

2010-03-19 01:19:52 +00:00

Makefile

make -fno-rtti the default unless a directory builds with REQUIRES_RTTI.

2010-01-24 20:43:08 +00:00

ScheduleDAGFast.cpp

Trim unneeded includes.

2010-01-21 21:44:43 +00:00

ScheduleDAGList.cpp

Change errs() to dbgs().

2010-01-05 01:24:43 +00:00

ScheduleDAGRRList.cpp

move target-independent opcodes out of TargetInstrInfo

2010-02-09 19:54:29 +00:00

ScheduleDAGSDNodes.cpp

Scheduler assumes SDDbgValue nodes are in source order. That's true currently. But add an assertion to verify it.

2010-03-25 07:16:57 +00:00

ScheduleDAGSDNodes.h

Teach pre-regalloc scheduler to schedule loads from nearby addresses. It may improve cache locality. This is controlled by -cluster-loads for now.

2010-01-22 03:36:51 +00:00

SDNodeDbgValue.h

Make sure SDDbgValue.Invalid is initialized to false by all the constructors.

2010-03-25 05:50:26 +00:00

SDNodeOrdering.h

Allow 0 as an order number. Don't assign an order to formal arguments.

2009-12-22 21:35:02 +00:00

SelectionDAG.cpp

Change how dbg_value sdnodes are converted into machine instructions. Their placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers.

2010-03-25 01:38:16 +00:00

SelectionDAGBuilder.cpp

Change how dbg_value sdnodes are converted into machine instructions. Their placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers.

2010-03-25 01:38:16 +00:00

SelectionDAGBuilder.h

Assign the ordering of SDNodes in a much less intrusive fashion. After the

2010-01-28 21:51:40 +00:00

SelectionDAGISel.cpp

finally remove the immAllOnesV_bc/immAllZerosV_bc patterns

2010-03-28 08:43:23 +00:00

SelectionDAGPrinter.cpp

Change errs() to dbgs().

2010-01-05 01:24:45 +00:00

TargetLowering.cpp

Add few missed libcalls and correct names for others.

2010-03-26 21:32:14 +00:00