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11ee15bafc
Summary: We can allow sinking if the single user block has only one unique predecessor, regardless of the number of edges. Note that a switch statement with multiple cases can have the same destination. Reviewers: mcrosier, majnemer, spatel, reames Subscribers: reames, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D23722 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279448 91177308-0d34-0410-b5e6-96231b3b80d8
80 lines
2.5 KiB
LLVM
80 lines
2.5 KiB
LLVM
; RUN: opt -instcombine -S < %s | FileCheck %s
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;; This tests that the instructions in the entry blocks are sunk into each
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;; arm of the 'if'.
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define i32 @test1(i1 %C, i32 %A, i32 %B) {
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; CHECK-LABEL: @test1(
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entry:
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%tmp.2 = sdiv i32 %A, %B ; <i32> [#uses=1]
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%tmp.9 = add i32 %B, %A ; <i32> [#uses=1]
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br i1 %C, label %then, label %endif
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then: ; preds = %entry
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ret i32 %tmp.9
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endif: ; preds = %entry
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; CHECK: sdiv i32
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; CHECK-NEXT: ret i32
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ret i32 %tmp.2
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}
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;; PHI use, sink divide before call.
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define i32 @test2(i32 %x) nounwind ssp {
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; CHECK-LABEL: @test2(
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; CHECK-NOT: sdiv i32
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entry:
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br label %bb
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bb: ; preds = %bb2, %entry
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%x_addr.17 = phi i32 [ %x, %entry ], [ %x_addr.0, %bb2 ] ; <i32> [#uses=4]
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%i.06 = phi i32 [ 0, %entry ], [ %4, %bb2 ] ; <i32> [#uses=1]
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%0 = add nsw i32 %x_addr.17, 1 ; <i32> [#uses=1]
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%1 = sdiv i32 %0, %x_addr.17 ; <i32> [#uses=1]
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%2 = icmp eq i32 %x_addr.17, 0 ; <i1> [#uses=1]
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br i1 %2, label %bb1, label %bb2
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bb1: ; preds = %bb
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; CHECK: bb1:
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; CHECK-NEXT: add nsw i32 %x_addr.17, 1
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; CHECK-NEXT: sdiv i32
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; CHECK-NEXT: tail call i32 @bar()
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%3 = tail call i32 @bar() nounwind ; <i32> [#uses=0]
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br label %bb2
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bb2: ; preds = %bb, %bb1
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%x_addr.0 = phi i32 [ %1, %bb1 ], [ %x_addr.17, %bb ] ; <i32> [#uses=2]
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%4 = add nsw i32 %i.06, 1 ; <i32> [#uses=2]
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%exitcond = icmp eq i32 %4, 1000000 ; <i1> [#uses=1]
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br i1 %exitcond, label %bb4, label %bb
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bb4: ; preds = %bb2
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ret i32 %x_addr.0
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}
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declare i32 @bar()
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define i32 @test3(i32* nocapture readonly %P, i32 %i) {
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entry:
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%idxprom = sext i32 %i to i64
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%arrayidx = getelementptr inbounds i32, i32* %P, i64 %idxprom
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%0 = load i32, i32* %arrayidx, align 4
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switch i32 %i, label %sw.epilog [
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i32 5, label %sw.bb
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i32 2, label %sw.bb
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]
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sw.bb: ; preds = %entry, %entry
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; CHECK-LABEL: sw.bb:
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; CHECK: %idxprom = sext i32 %i to i64
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; CHECK: %arrayidx = getelementptr inbounds i32, i32* %P, i64 %idxprom
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; CHECK: %0 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %0, %i
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br label %sw.epilog
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sw.epilog: ; preds = %entry, %sw.bb
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%sum.0 = phi i32 [ %add, %sw.bb ], [ 0, %entry ]
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ret i32 %sum.0
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}
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